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authorXiang, Haihao <haihao.xiang@intel.com>2008-08-29 09:49:16 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2008-08-29 09:49:16 +0800
commit7a2ab6d05573508389b38f8f1fa261ba56062865 (patch)
tree7eed23d4f19452beb11faa4b8ddcdab22b3d6ded
parent6073b49c7915147c28e9887039a51b8e4e2e62c5 (diff)
i965: force thread switch after IF/ELSE/ENDIF. partial fix for #16882.
A thread switch is implicitly invoked after the issuance of an IF/ELSE/ENDIF instruction if necessary. Unfortunately it seems sometimes a forced thread switch is needed.
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu_emit.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 27abdd658b..0bfbec9d14 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -513,6 +513,8 @@ struct brw_instruction *brw_IF(struct brw_compile *p, GLuint execute_size)
insn->header.compression_control = BRW_COMPRESSION_NONE;
insn->header.predicate_control = BRW_PREDICATE_NORMAL;
insn->header.mask_control = BRW_MASK_ENABLE;
+ if (!p->single_program_flow)
+ insn->header.thread_control = BRW_THREAD_SWITCH;
p->current->header.predicate_control = BRW_PREDICATE_NONE;
@@ -538,6 +540,8 @@ struct brw_instruction *brw_ELSE(struct brw_compile *p,
insn->header.compression_control = BRW_COMPRESSION_NONE;
insn->header.execution_size = if_insn->header.execution_size;
insn->header.mask_control = BRW_MASK_ENABLE;
+ if (!p->single_program_flow)
+ insn->header.thread_control = BRW_THREAD_SWITCH;
/* Patch the if instruction to point at this instruction.
*/
@@ -579,6 +583,7 @@ void brw_ENDIF(struct brw_compile *p,
insn->header.compression_control = BRW_COMPRESSION_NONE;
insn->header.execution_size = patch_insn->header.execution_size;
insn->header.mask_control = BRW_MASK_ENABLE;
+ insn->header.thread_control = BRW_THREAD_SWITCH;
assert(patch_insn->bits3.if_else.jump_count == 0);