r300: name registers for human readability

Signed-off-by: Corbin Simpson <MostAwesomeDude@gmail.com>

1 files changed, 103 insertions, 103 deletions

diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c
index 0ef26d4305..48e0f54db9 100644
--- a/src/gallium/drivers/r300/r300_surface.c
+++ b/src/gallium/drivers/r300/r300_surface.c
@@ -47,12 +47,12 @@ R300_PACIFY;
 OUT_CS_REG(R300_TX_INVALTAGS, 0x0);
 R300_PACIFY;
 /* Viewport setup */
-OUT_CS_REG(0x1D98, 0x43000000);
-OUT_CS_REG(0x1D9C, 0x43002000);
-OUT_CS_REG(0x1DA0, 0xC3000000);
-OUT_CS_REG(0x1DA4, 0x43002000);
-OUT_CS_REG(0x1DA8, 0x3F000000);
-OUT_CS_REG(0x1DAC, 0x3F000000);
+OUT_CS_REG(R300_SE_VPORT_XSCALE, 0x43000000);
+OUT_CS_REG(R300_SE_VPORT_XOFFSET, 0x43002000);
+OUT_CS_REG(R300_SE_VPORT_YSCALE, 0xC3000000);
+OUT_CS_REG(R300_SE_VPORT_YOFFSET, 0x43002000);
+OUT_CS_REG(R300_SE_VPORT_ZSCALE, 0x3F000000);
+OUT_CS_REG(R300_SE_VPORT_ZOFFSET, 0x3F000000);
 /* Flush PVS. */
 OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
 
@@ -98,61 +98,61 @@ OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 |
 /* XXX should this be related to the actual point size? */
 OUT_CS_REG(R300_GA_POINT_MINMAX, 0x6 |
     (0x1800 << R300_GA_POINT_MINMAX_MAX_SHIFT));
-OUT_CS_REG(0x4234, 0x00030006);
-OUT_CS_REG(0x4238, 0x3BAAAAAB);
-OUT_CS_REG(0x4260, 0x00000000);
-OUT_CS_REG(0x4264, 0x00000000);
-OUT_CS_REG(0x4268, 0x3F800000);
-OUT_CS_REG(0x4274, 0x00000002);
-OUT_CS_REG(0x4278, 0x0003AAAA);
-OUT_CS_REG(0x427C, 0x00000000);
-OUT_CS_REG(0x4280, 0x00000000);
-OUT_CS_REG(0x4288, 0x00000000);
-OUT_CS_REG(0x428C, 0x00000001);
-OUT_CS_REG(0x4290, 0x00000000);
-OUT_CS_REG(0x4294, 0x3DBF1412);
-OUT_CS_REG(0x4298, 0x00000000);
-OUT_CS_REG(0x42A0, 0x00000000);
-OUT_CS_REG(0x42A4, 0x00000000);
-OUT_CS_REG(0x42A8, 0x00000000);
-OUT_CS_REG(0x42AC, 0x00000000);
-OUT_CS_REG(0x42B0, 0x00000000);
-OUT_CS_REG(0x42B4, 0x00000000);
-OUT_CS_REG(0x42B8, 0x00000000);
-OUT_CS_REG(0x42C0, 0x4B7FFFFF);
-OUT_CS_REG(0x42C4, 0x00000000);
-OUT_CS_REG(0x43A4, 0x0000001C);
-OUT_CS_REG(0x43A8, 0x2DA49525);
-OUT_CS_REG(0x43E8, 0x00FFFFFF);
-OUT_CS_REG(0x46A4, 0x00001B00);
+OUT_CS_REG(R300_GA_LINE_CNTL, 0x00030006);
+OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, 0x3BAAAAAB);
+OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, 0x00000000);
+OUT_CS_REG(R300_GA_LINE_S0, 0x00000000);
+OUT_CS_REG(R300_GA_LINE_S1, 0x3F800000);
+OUT_CS_REG(R300_GA_ENHANCE, 0x00000002);
+OUT_CS_REG(R300_GA_COLOR_CONTROL, 0x0003AAAA);
+OUT_CS_REG(R300_GA_SOLID_RG, 0x00000000);
+OUT_CS_REG(R300_GA_SOLID_BA, 0x00000000);
+OUT_CS_REG(R300_GA_POLY_MODE, 0x00000000);
+OUT_CS_REG(R300_GA_ROUND_MODE, 0x00000001);
+OUT_CS_REG(R300_GA_OFFSET, 0x00000000);
+OUT_CS_REG(R300_GA_FOG_SCALE, 0x3DBF1412);
+OUT_CS_REG(R300_GA_FOG_OFFSET, 0x00000000);
+OUT_CS_REG(R300_SU_TEX_WRAP, 0x00000000);
+OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_SCALE, 0x00000000);
+OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_OFFSET, 0x00000000);
+OUT_CS_REG(R300_SU_POLY_OFFSET_BACK_SCALE, 0x00000000);
+OUT_CS_REG(R300_SU_POLY_OFFSET_BACK_OFFSET, 0x00000000);
+OUT_CS_REG(R300_SU_POLY_OFFSET_ENABLE, 0x00000000);
+OUT_CS_REG(R300_SU_CULL_MODE, 0x00000000);
+OUT_CS_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF);
+OUT_CS_REG(R300_SU_DEPTH_OFFSET, 0x00000000);
+OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C);
+OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525);
+OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF);
+OUT_CS_REG(R300_US_OUT_FMT, 0x00001B00);
 OUT_CS_REG(0x46A8, 0x00001B0F);
 OUT_CS_REG(0x46AC, 0x00001B0F);
 OUT_CS_REG(0x46B0, 0x00001B0F);
-OUT_CS_REG(0x46B4, 0x00000001);
-OUT_CS_REG(0x4600, 0x00000000);
-OUT_CS_REG(0x4604, 0x00000000);
-OUT_CS_REG(0x4608, 0x00000000);
-OUT_CS_REG(0x4610, 0x00000000);
-OUT_CS_REG(0x4614, 0x00000000);
-OUT_CS_REG(0x4618, 0x00000000);
-OUT_CS_REG(0x461C, 0x00000000);
-OUT_CS_REG(0x48C0, 0x00000000);
-OUT_CS_REG(0x46C0, 0x00000000);
-OUT_CS_REG(0x49C0, 0x00000000);
-OUT_CS_REG(0x47C0, 0x00000000);
-OUT_CS_REG(0x4BC0, 0x00000002);
-OUT_CS_REG(0x4BC8, 0x00000000);
-OUT_CS_REG(0x4BCC, 0x00000000);
-OUT_CS_REG(0x4BD0, 0x00000000);
-OUT_CS_REG(0x4BD8, 0x00000000);
-OUT_CS_REG(0x4BD8, 0x00000000);
-OUT_CS_REG(0x4E00, 0x00000000);
-OUT_CS_REG(0x4E0C, 0x0000000F);
+OUT_CS_REG(R300_US_W_FMT, 0x00000001);
+OUT_CS_REG(R300_US_CONFIG, 0x00000000);
+OUT_CS_REG(R300_US_PIXSIZE, 0x00000000);
+OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000);
+OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000);
+OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000);
+OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000);
+OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00000000);
+OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00000000);
+OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x00000000);
+OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00000000);
+OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x00000000);
+OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000002);
+OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x00000000);
+OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x00000000);
+OUT_CS_REG(R300_FG_FOG_COLOR_B, 0x00000000);
+OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000);
+OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000);
+OUT_CS_REG(R300_RB3D_CCTL, 0x00000000);
+OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F);
 
 r300_emit_blend_color_state(r300, &blend_color_clear_state);
 
-OUT_CS_REG(0x4E10, 0x00000000);
-OUT_CS_REG(0x4E54, 0x00000000);
+OUT_CS_REG(R300_RB3D_BLEND_COLOR, 0x00000000);
+OUT_CS_REG(0x4E54, 0x00000000); 
 OUT_CS_REG(0x4E58, 0x00000000);
 OUT_CS_REG(0x4E5C, 0x00000000);
 OUT_CS_REG(0x4E60, 0x00000000);
@@ -160,45 +160,45 @@ OUT_CS_REG(0x4E64, 0x00000000);
 OUT_CS_REG(0x4E68, 0x00000000);
 OUT_CS_REG(0x4E6C, 0x00000000);
 OUT_CS_REG(0x4E70, 0x00000000);
-OUT_CS_REG(0x4E88, 0x00000000);
-OUT_CS_REG(0x4EA0, 0x00000000);
-OUT_CS_REG(0x4EA4, 0xFFFFFFFF);
-OUT_CS_REG(0x4F00, 0x00000010);
-OUT_CS_REG(0x4F04, 0x00038038);
-OUT_CS_REG(0x4F08, 0x00FFFF00);
-OUT_CS_REG(0x4F10, 0x00000002);
-OUT_CS_REG(0x4F18, 0x00000003);
-OUT_CS_REG(0x4F1C, 0x00000000);
-OUT_CS_REG(0x4F28, 0x00000000);
+OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000);
+OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000);
+OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF);
+OUT_CS_REG(R300_ZB_CNTL, 0x00000010);
+OUT_CS_REG(R300_ZB_ZSTENCILCNTL, 0x00038038);
+OUT_CS_REG(R300_ZB_STENCILREFMASK, 0x00FFFF00);
+OUT_CS_REG(R300_ZB_FORMAT, 0x00000002);
+OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, 0x00000003);
+OUT_CS_REG(R300_ZB_BW_CNTL, 0x00000000);
+OUT_CS_REG(R300_ZB_DEPTHCLEARVALUE, 0x00000000);
 OUT_CS_REG(0x4F30, 0x00000000);
 OUT_CS_REG(0x4F34, 0x00000000);
-OUT_CS_REG(0x4F44, 0x00000000);
-OUT_CS_REG(0x4F54, 0x00000000);
-OUT_CS_REG(0x43E8, 0x00000000);
+OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000);
+OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000);
+OUT_CS_REG(R300_SC_SCREENDOOR, 0x00000000);
 R300_PACIFY;
-OUT_CS_REG(0x43E8, 0x00FFFFFF);
-OUT_CS_REG(0x2150, 0x21030003);
-OUT_CS_REG(0x4BC0, 0x00000000);
+OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF);
+OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x21030003);
+OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000000);
 OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688);
 OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1);
 OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405);
-OUT_CS_REG(0x20B0, 0x0000043F);
-OUT_CS_REG(0x20B4, 0x00000008);
-OUT_CS_REG(0x21DC, 0xAAAAAAAA);
-OUT_CS_REG(0x2090, 0x00000003);
-OUT_CS_REG(0x2094, 0x00000000);
+OUT_CS_REG(R300_SE_VTE_CNTL, 0x0000043F);
+OUT_CS_REG(R300_VAP_VTX_SIZE, 0x00000008);
+OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA);
+OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, 0x00000003);
+OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x00000000);
 OUT_CS_REG(R300_TX_ENABLE, 0x0);
-OUT_CS_REG(0x1D98, 0x3F800000);
-OUT_CS_REG(0x1D9C, 0x00000000);
-OUT_CS_REG(0x1DA0, 0x3F800000);
-OUT_CS_REG(0x1DA4, 0x00000000);
-OUT_CS_REG(0x1DA8, 0x3F800000);
-OUT_CS_REG(0x1DAC, 0x00000000);
-OUT_CS_REG(0x4BD4, 0x00000000);
+OUT_CS_REG(R300_SE_VPORT_XSCALE, 0x3F800000);
+OUT_CS_REG(R300_SE_VPORT_XOFFSET, 0x00000000);
+OUT_CS_REG(R300_SE_VPORT_YSCALE, 0x3F800000);
+OUT_CS_REG(R300_SE_VPORT_YOFFSET, 0x00000000);
+OUT_CS_REG(R300_SE_VPORT_ZSCALE, 0x3F800000);
+OUT_CS_REG(R300_SE_VPORT_ZOFFSET, 0x00000000);
+OUT_CS_REG(R300_FG_ALPHA_FUNC, 0x00000000);
 
 r300_emit_blend_state(r300, &blend_clear_state);
 
-OUT_CS_REG(0x221C, 0x0001C000);
+OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0001C000);
 OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) |
     ((w * 6) << R300_POINTSIZE_X_SHIFT));
 
@@ -221,28 +221,28 @@ if (caps->is_r500) {
 OUT_CS_REG(R300_RS_COUNT, (1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN);
 OUT_CS_REG(R300_RS_INST_COUNT, 0x0);
 
-OUT_CS_REG(0x4330, 0x00004000);
-OUT_CS_REG(0x4600, 0x00000000);
-OUT_CS_REG(0x4604, 0x00000000);
-OUT_CS_REG(0x4608, 0x00000000);
-OUT_CS_REG(0x4610, 0x00000000);
-OUT_CS_REG(0x4614, 0x00000000);
-OUT_CS_REG(0x4618, 0x00000000);
-OUT_CS_REG(0x461C, 0x00400000);
-OUT_CS_REG(0x48C0, 0x00050A80);
-OUT_CS_REG(0x46C0, 0x1C000000);
-OUT_CS_REG(0x49C0, 0x00040889);
-OUT_CS_REG(0x47C0, 0x01000000);
+OUT_CS_REG(R300_RS_INST_0, 0x00004000);
+OUT_CS_REG(R300_US_CONFIG, 0x00000000);
+OUT_CS_REG(R300_US_PIXSIZE, 0x00000000);
+OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000);
+OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000);
+OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000);
+OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000);
+OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00400000);
+OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00050A80);
+OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000);
+OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00040889);
+OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x01000000);
 /* XXX these magic numbers should be explained when
  * this becomes a cached state object */
 OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) |
     (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT));
-OUT_CS_REG(0x22D0, 0x00100000);
-OUT_CS_REG(0x22D4, 0x00000000);
-OUT_CS_REG(0x22D8, 0x00000001);
-OUT_CS_REG(0x43E8, 0x00000000);
+OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000);
+OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000);
+OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001);
+OUT_CS_REG(R300_SC_SCREENDOOR, 0x00000000);
 R300_PACIFY;
-OUT_CS_REG(0x43E8, 0x00FFFFFF);
+OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF);
 /* XXX translate these back into normal instructions */
 OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1);
 OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0);
@@ -260,8 +260,8 @@ r300_emit_dsa_state(r300, &dsa_clear_state);
 R300_PACIFY;
 OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1);
 OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
-//OUT_CS_REG(0x4E38, 0x00C00100);
-OUT_CS_REG(0x4E0C, 0x0000000F);
+//OUT_CS_REG(R300_RB3D_COLORPITCH0, 0x00C00100);
+OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F);
 /* XXX Packet3 */
 OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8));
 OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING |