unsigned int -> uint32_t, unsigned char -> uint8_t where the size matters.

A bit more cosmetics.
Improved state emit on Savage 3D/IX/MX.

6 files changed, 361 insertions, 340 deletions

diff --git a/src/mesa/drivers/dri/savage/savage_3d_reg.h b/src/mesa/drivers/dri/savage/savage_3d_reg.h
index 70f31c16ef..d2971c48f5 100644
--- a/src/mesa/drivers/dri/savage/savage_3d_reg.h
+++ b/src/mesa/drivers/dri/savage/savage_3d_reg.h
@@ -26,9 +26,6 @@
 #ifndef SAVAGE_3D_REG_H
 #define SAVAGE_3D_REG_H
 
-#define uint32 unsigned long
-#define uint16 unsigned short
-
 #define VIDEO_MEM_ADR                   0x02
 #define SYSTEM_MEM_ADR                  0x01
 #define AGP_MEM_ADR                     0x03
@@ -43,10 +40,10 @@ typedef union
 {
     struct
     {
-        unsigned int reserved : 4;
-        unsigned int ofs      : 28;
+        unsigned reserved : 4;
+        unsigned ofs      : 28;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegZPixelOffset;
 
 /* This reg exists only on Savage4. */
@@ -54,16 +51,16 @@ typedef union
 {
     struct
     {
-        unsigned int cmpFunc     :  3;
-        unsigned int stencilEn   :  1;
-        unsigned int readMask    :  8;
-        unsigned int writeMask   :  8;
-        unsigned int failOp      :  3;
-        unsigned int passZfailOp :  3;
-        unsigned int passZpassOp :  3;
-        unsigned int reserved    :  3;
+        unsigned cmpFunc     :  3;
+        unsigned stencilEn   :  1;
+        unsigned readMask    :  8;
+        unsigned writeMask   :  8;
+        unsigned failOp      :  3;
+        unsigned passZfailOp :  3;
+        unsigned passZpassOp :  3;
+        unsigned reserved    :  3;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegStencilCtrl;
 
 /**************************
@@ -74,38 +71,38 @@ typedef union
 {
     struct
     {
-        unsigned int tex0Width  : 4;
-        unsigned int tex0Height : 4;
-        unsigned int tex0Fmt    : 4;
-        unsigned int tex1Width  : 4;
-        unsigned int tex1Height : 4;
-        unsigned int tex1Fmt    : 4;
-        unsigned int texBLoopEn : 1;
-        unsigned int tex0En     : 1;
-        unsigned int tex1En     : 1;
-        unsigned int orthProjEn : 1;
-        unsigned int reserved   : 1;
-        unsigned int palSize    : 2;
-        unsigned int newPal     : 1;
+        unsigned tex0Width  : 4;
+        unsigned tex0Height : 4;
+        unsigned tex0Fmt    : 4;
+        unsigned tex1Width  : 4;
+        unsigned tex1Height : 4;
+        unsigned tex1Fmt    : 4;
+        unsigned texBLoopEn : 1;
+        unsigned tex0En     : 1;
+        unsigned tex1En     : 1;
+        unsigned orthProjEn : 1;
+        unsigned reserved   : 1;
+        unsigned palSize    : 2;
+        unsigned newPal     : 1;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegTexDescr_s4;
 typedef union
 {
     struct
     {
-        unsigned int texWidth  : 4;
-        unsigned int reserved1 : 4;
-        unsigned int texHeight : 4;
-        unsigned int reserved2 : 4;
+        unsigned texWidth  : 4;
+        unsigned reserved1 : 4;
+        unsigned texHeight : 4;
+        unsigned reserved2 : 4;
 	/* Savage3D supports only the first 8 texture formats defined in
 	   enum TexFmt in savge_bci.h. */
-        unsigned int texFmt    : 3;
-        unsigned int palSize   : 2;
-        unsigned int reserved3 : 10;
-        unsigned int newPal    : 1;
+        unsigned texFmt    : 3;
+        unsigned palSize   : 2;
+        unsigned reserved3 : 10;
+        unsigned newPal    : 1;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegTexDescr_s3d;
 
 /* The layout of this reg is the same on Savage4 and Savage3D,
@@ -114,12 +111,12 @@ typedef union
 {
     struct
     {
-        unsigned int inSysTex : 1;
-        unsigned int inAGPTex : 1;
-        unsigned int reserved : 1;
-        unsigned int addr     : 29;
+        unsigned inSysTex : 1;
+        unsigned inAGPTex : 1;
+        unsigned reserved : 1;
+        unsigned addr     : 29;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegTexAddr;
 
 /* The layout of this reg is the same on Savage4 and Savage3D. */
@@ -127,10 +124,10 @@ typedef union
 {
     struct
     {
-        unsigned int reserved : 3;
-        unsigned int addr     : 29;
+        unsigned reserved : 3;
+        unsigned addr     : 29;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegTexPalAddr;
 
 /* The layout of this reg on Savage4 and Savage3D are very similar. */
@@ -138,10 +135,10 @@ typedef union
 {
     struct
     {
-        unsigned int xprClr0 : 16;
-        unsigned int xprClr1 : 16; /* this is reserved on Savage3D */
+        unsigned xprClr0 : 16;
+        unsigned xprClr1 : 16; /* this is reserved on Savage3D */
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegTexXprClr;   /* transparency color in RGB565 format*/
 
 /* The layout of this reg differs between Savage4 and Savage3D.
@@ -150,47 +147,47 @@ typedef union
 {
     struct
     {
-        unsigned int filterMode         : 2;
-        unsigned int mipmapEnable       : 1;
-        unsigned int dBias              : 9;
-        unsigned int dMax               : 4;
-        unsigned int uMode              : 2;
-        unsigned int vMode              : 2;
-        unsigned int useDFraction       : 1;
-        unsigned int texXprEn           : 1;
-        unsigned int clrBlendAlphaSel   : 2;
-        unsigned int clrArg1CopyAlpha   : 1;
-        unsigned int clrArg2CopyAlpha   : 1;
-        unsigned int clrArg1Invert      : 1;
-        unsigned int clrArg2Invert      : 1;
-        unsigned int alphaBlendAlphaSel : 2;
-        unsigned int alphaArg1Invert    : 1;
-        unsigned int alphaArg2Invert    : 1;
+        unsigned filterMode         : 2;
+        unsigned mipmapEnable       : 1;
+        unsigned dBias              : 9;
+        unsigned dMax               : 4;
+        unsigned uMode              : 2;
+        unsigned vMode              : 2;
+        unsigned useDFraction       : 1;
+        unsigned texXprEn           : 1;
+        unsigned clrBlendAlphaSel   : 2;
+        unsigned clrArg1CopyAlpha   : 1;
+        unsigned clrArg2CopyAlpha   : 1;
+        unsigned clrArg1Invert      : 1;
+        unsigned clrArg2Invert      : 1;
+        unsigned alphaBlendAlphaSel : 2;
+        unsigned alphaArg1Invert    : 1;
+        unsigned alphaArg2Invert    : 1;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegTexCtrl_s4;
 typedef union
 {
     struct
     {
-        unsigned int filterMode    : 2;
-        unsigned int mipmapDisable : 1;
-        unsigned int dBias         : 9;
-        unsigned int uWrapEn       : 1;
-        unsigned int vWrapEn       : 1;
-        unsigned int wrapMode      : 2;
-        unsigned int texEn         : 1;
-        unsigned int useDFraction  : 1;
-        unsigned int reserved1     : 1;
+        unsigned filterMode    : 2;
+        unsigned mipmapDisable : 1;
+        unsigned dBias         : 9;
+        unsigned uWrapEn       : 1;
+        unsigned vWrapEn       : 1;
+        unsigned wrapMode      : 2;
+        unsigned texEn         : 1;
+        unsigned useDFraction  : 1;
+        unsigned reserved1     : 1;
 	/* Color Compare Alpha Blend Control
            0 -  reduce dest alpha to 0 or 1
            1 - blend with destination
 	   The Utah-Driver doesn't know how to use it and sets it to 0. */
-        unsigned int CCA           : 1;
-        unsigned int texXprEn      : 1;
-        unsigned int reserved2     : 11;
+        unsigned CCA           : 1;
+        unsigned texXprEn      : 1;
+        unsigned reserved2     : 11;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegTexCtrl_s3d;
 
 /* This reg exists only on Savage4. */
@@ -198,30 +195,30 @@ typedef union
 {
     struct
     {
-        unsigned int colorArg1Sel    : 2;
-        unsigned int colorArg2Sel    : 3;
-        unsigned int colorInvAlphaEn : 1;
-        unsigned int colorInvArg2En  : 1;
-        unsigned int colorPremodSel  : 1;
-        unsigned int colorMod1Sel    : 1;
-        unsigned int colorMod2Sel    : 2;
-        unsigned int colorAddSel     : 2;
-        unsigned int colorDoBlend    : 1;
-        unsigned int colorDo2sCompl  : 1;
-        unsigned int colorAddBiasEn  : 1;
-        unsigned int alphaArg1Sel    : 2;
-        unsigned int alphaArg2Sel    : 3;
-        unsigned int alphaMod1Sel    : 1;
-        unsigned int alphaMod2Sel    : 2;
-        unsigned int alphaAdd0Sel    : 1;
-        unsigned int alphaDoBlend    : 1;
-        unsigned int alphaDo2sCompl  : 1;
-        unsigned int colorStageClamp : 1;
-        unsigned int alphaStageClamp : 1;
-        unsigned int colorDoDiffMul  : 1;
-        unsigned int LeftShiftVal    : 2;
+        unsigned colorArg1Sel    : 2;
+        unsigned colorArg2Sel    : 3;
+        unsigned colorInvAlphaEn : 1;
+        unsigned colorInvArg2En  : 1;
+        unsigned colorPremodSel  : 1;
+        unsigned colorMod1Sel    : 1;
+        unsigned colorMod2Sel    : 2;
+        unsigned colorAddSel     : 2;
+        unsigned colorDoBlend    : 1;
+        unsigned colorDo2sCompl  : 1;
+        unsigned colorAddBiasEn  : 1;
+        unsigned alphaArg1Sel    : 2;
+        unsigned alphaArg2Sel    : 3;
+        unsigned alphaMod1Sel    : 1;
+        unsigned alphaMod2Sel    : 2;
+        unsigned alphaAdd0Sel    : 1;
+        unsigned alphaDoBlend    : 1;
+        unsigned alphaDo2sCompl  : 1;
+        unsigned colorStageClamp : 1;
+        unsigned alphaStageClamp : 1;
+        unsigned colorDoDiffMul  : 1;
+        unsigned LeftShiftVal    : 2;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegTexBlendCtrl;
 
 /* This reg exists only on Savage4. */
@@ -229,12 +226,12 @@ typedef union
 {
     struct
     {
-        unsigned int blue  : 8;
-        unsigned int green : 8;
-        unsigned int red   : 8;
-        unsigned int alpha : 8;
+        unsigned blue  : 8;
+        unsigned green : 8;
+        unsigned red   : 8;
+        unsigned alpha : 8;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegTexBlendColor;
 
 /********************************
@@ -245,12 +242,12 @@ typedef union
 {
     struct
     {
-        unsigned int frmBufOffset : 13;
-        unsigned int reserved     : 12;
-        unsigned int widthInTile  : 6;
-        unsigned int bitPerPixel  : 1;
+        unsigned frmBufOffset : 13;
+        unsigned reserved     : 12;
+        unsigned widthInTile  : 6;
+        unsigned bitPerPixel  : 1;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegTiledSurface;
 
 /********************************
@@ -262,12 +259,12 @@ typedef union
 {
     struct
     {
-        unsigned int scissorXStart : 11;
-        unsigned int dPerfAccelEn  : 1;
-        unsigned int scissorYStart : 12;
-        unsigned int alphaRefVal   : 8;
+        unsigned scissorXStart : 11;
+        unsigned dPerfAccelEn  : 1;
+        unsigned scissorYStart : 12;
+        unsigned alphaRefVal   : 8;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegDrawCtrl0;
 
 /* This reg exists only on Savage4. */
@@ -275,16 +272,16 @@ typedef union
 {
     struct
     {
-        unsigned int scissorXEnd      : 11;
-        unsigned int xyOffsetEn       :  1;
-        unsigned int scissorYEnd      : 12;
-        unsigned int ditherEn         :  1;
-        unsigned int nonNormTexCoord  :  1;
-        unsigned int cullMode         :  2;
-        unsigned int alphaTestCmpFunc :  3;
-        unsigned int alphaTestEn      :  1;
+        unsigned scissorXEnd      : 11;
+        unsigned xyOffsetEn       :  1;
+        unsigned scissorYEnd      : 12;
+        unsigned ditherEn         :  1;
+        unsigned nonNormTexCoord  :  1;
+        unsigned cullMode         :  2;
+        unsigned alphaTestCmpFunc :  3;
+        unsigned alphaTestEn      :  1;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegDrawCtrl1;
 
 /* This reg exists only on Savage4. */
@@ -292,22 +289,22 @@ typedef union
 {
     struct
     {
-        unsigned int dstAlphaMode        :  3;
-        unsigned int dstMinusSrc         :  1;
-        unsigned int srcAlphaMode        :  3;
-        unsigned int binaryFinalAlpha    :  1;
-        unsigned int dstAlphaModeHighBit :  1;
-        unsigned int srcAlphaModeHighBit :  1;
-        unsigned int reserved1           : 15;
-        unsigned int wrZafterAlphaTst    :  1;
-        unsigned int drawUpdateEn        :  1;
-        unsigned int zUpdateEn           :  1;
-        unsigned int flatShadeEn         :  1;
-        unsigned int specShadeEn         :  1;
-        unsigned int flushPdDestWrites   :  1;
-        unsigned int flushPdZbufWrites   :  1;
+        unsigned dstAlphaMode        :  3;
+        unsigned dstMinusSrc         :  1;
+        unsigned srcAlphaMode        :  3;
+        unsigned binaryFinalAlpha    :  1;
+        unsigned dstAlphaModeHighBit :  1;
+        unsigned srcAlphaModeHighBit :  1;
+        unsigned reserved1           : 15;
+        unsigned wrZafterAlphaTst    :  1;
+        unsigned drawUpdateEn        :  1;
+        unsigned zUpdateEn           :  1;
+        unsigned flatShadeEn         :  1;
+        unsigned specShadeEn         :  1;
+        unsigned flushPdDestWrites   :  1;
+        unsigned flushPdZbufWrites   :  1;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegDrawLocalCtrl;
 
 /* This reg exists only on Savage3D. */
@@ -315,25 +312,25 @@ typedef union
 {
     struct
     {
-        unsigned int ditherEn          : 1;
-        unsigned int xyOffsetEn        : 1;
-        unsigned int cullMode          : 2;
-        unsigned int vertexCountReset  : 1;
-        unsigned int flatShadeEn       : 1;
-        unsigned int specShadeEn       : 1;
-        unsigned int dstAlphaMode      : 3;
-        unsigned int srcAlphaMode      : 3;
-        unsigned int reserved1         : 1;
-        unsigned int alphaTestCmpFunc  : 3;
-        unsigned int alphaTestEn       : 1;
-        unsigned int alphaRefVal       : 8;
-        unsigned int texBlendCtrl      : 3;
-        unsigned int flushPdDestWrites : 1;
-        unsigned int flushPdZbufWrites : 1;
+        unsigned ditherEn          : 1;
+        unsigned xyOffsetEn        : 1;
+        unsigned cullMode          : 2;
+        unsigned vertexCountReset  : 1;
+        unsigned flatShadeEn       : 1;
+        unsigned specShadeEn       : 1;
+        unsigned dstAlphaMode      : 3;
+        unsigned srcAlphaMode      : 3;
+        unsigned reserved1         : 1;
+        unsigned alphaTestCmpFunc  : 3;
+        unsigned alphaTestEn       : 1;
+        unsigned alphaRefVal       : 8;
+        unsigned texBlendCtrl      : 3;
+        unsigned flushPdDestWrites : 1;
+        unsigned flushPdZbufWrites : 1;
 	/* havn't found an equivalent for Savage4. Utah-driver sets it to 0. */
-        unsigned int interpMode        : 1;
+        unsigned interpMode        : 1;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegDrawCtrl;
 
 #define SAVAGETBC_DECAL_S3D                     0
@@ -350,12 +347,12 @@ typedef union
 {
     struct
     {
-        unsigned int scissorXStart : 11;
-	unsigned int reserved1     : 5;
-        unsigned int scissorYStart : 11;
-	unsigned int reserved2     : 5;
+        unsigned scissorXStart : 11;
+	unsigned reserved1     : 5;
+        unsigned scissorYStart : 11;
+	unsigned reserved2     : 5;
     } ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegScissorsStart;
 
 /* This reg exists only on Savage3D. */
@@ -363,12 +360,12 @@ typedef union
 {
     struct
     {
-        unsigned int scissorXEnd : 11;
-	unsigned int reserved1   : 5;
-        unsigned int scissorYEnd : 11;
-	unsigned int reserved2   : 5;
+        unsigned scissorXEnd : 11;
+	unsigned reserved1   : 5;
+        unsigned scissorYEnd : 11;
+	unsigned reserved2   : 5;
     } ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegScissorsEnd;
 
 /********************************
@@ -382,12 +379,12 @@ typedef union
 {
     struct
     {
-        unsigned int isSys    : 1;
-        unsigned int isAGP    : 1;
-        unsigned int reserved : 1;
-        unsigned int addr     : 29; /*quad word aligned*/
+        unsigned isSys    : 1;
+        unsigned isAGP    : 1;
+        unsigned reserved : 1;
+        unsigned addr     : 29; /*quad word aligned*/
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegVertBufAddr;
 
 /* I havn't found a Savage3D equivalent of this reg in the Utah-driver. 
@@ -397,12 +394,12 @@ typedef union
 {
     struct
     {
-        unsigned int isSys    : 1;
-        unsigned int isAGP    : 1;
-        unsigned int reserved : 1;
-        unsigned int addr     : 29; /*4-quad word aligned*/
+        unsigned isSys    : 1;
+        unsigned isAGP    : 1;
+        unsigned reserved : 1;
+        unsigned addr     : 29; /*4-quad word aligned*/
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegDMABufAddr;
 
 /********************************
@@ -413,24 +410,24 @@ typedef union
 {
     struct
     {
-        unsigned int y01        : 1;
-        unsigned int y12        : 1;
-        unsigned int y20        : 1;
-        unsigned int u01        : 1;
-        unsigned int u12        : 1;
-        unsigned int u20        : 1;
-        unsigned int v01        : 1;
-        unsigned int v12        : 1;
-        unsigned int v20        : 1;
-        unsigned int cullEn     : 1;
-        unsigned int cullOrient : 1;
-        unsigned int loadNewTex : 1;
-        unsigned int loadNewPal : 1;
-        unsigned int doDSetup   : 1;
-        unsigned int reserved   : 17;
-        unsigned int kickOff    : 1;
+        unsigned y01        : 1;
+        unsigned y12        : 1;
+        unsigned y20        : 1;
+        unsigned u01        : 1;
+        unsigned u12        : 1;
+        unsigned u20        : 1;
+        unsigned v01        : 1;
+        unsigned v12        : 1;
+        unsigned v20        : 1;
+        unsigned cullEn     : 1;
+        unsigned cullOrient : 1;
+        unsigned loadNewTex : 1;
+        unsigned loadNewPal : 1;
+        unsigned doDSetup   : 1;
+        unsigned reserved   : 17;
+        unsigned kickOff    : 1;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegFlag;
 
 /********************************
@@ -442,34 +439,34 @@ typedef union
 {
     struct
     {
-        unsigned int zCmpFunc      : 3;
-        unsigned int reserved1     : 2;
-        unsigned int zBufEn        : 1;
-        unsigned int reserved2     : 1;
-        unsigned int zExpOffset    : 8;
-        unsigned int reserved3     : 1;
-        unsigned int stencilRefVal : 8;
-        unsigned int autoZEnable   : 1;
-        unsigned int frameID       : 1;
-        unsigned int reserved4     : 4;
-        unsigned int floatZEn      : 1;
-        unsigned int wToZEn        : 1;
+        unsigned zCmpFunc      : 3;
+        unsigned reserved1     : 2;
+        unsigned zBufEn        : 1;
+        unsigned reserved2     : 1;
+        unsigned zExpOffset    : 8;
+        unsigned reserved3     : 1;
+        unsigned stencilRefVal : 8;
+        unsigned autoZEnable   : 1;
+        unsigned frameID       : 1;
+        unsigned reserved4     : 4;
+        unsigned floatZEn      : 1;
+        unsigned wToZEn        : 1;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegZBufCtrl_s4;
 typedef union
 {
     struct {
-        unsigned int zCmpFunc         : 3;
-        unsigned int drawUpdateEn     : 1;
-        unsigned int zUpdateEn        : 1;
-        unsigned int zBufEn           : 1;
-        unsigned int reserved1        : 2;
-        unsigned int zExpOffset       : 8;
-        unsigned int wrZafterAlphaTst : 1;
-        unsigned int reserved2        : 15;
+        unsigned zCmpFunc         : 3;
+        unsigned drawUpdateEn     : 1;
+        unsigned zUpdateEn        : 1;
+        unsigned zBufEn           : 1;
+        unsigned reserved1        : 2;
+        unsigned zExpOffset       : 8;
+        unsigned wrZafterAlphaTst : 1;
+        unsigned reserved2        : 15;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegZBufCtrl_s3d;
 
 /* The layout of this reg on Savage4 and Savage3D is very similar. */
@@ -478,12 +475,12 @@ typedef union
     struct
     {
 	/* In the Utah-Driver the offset is defined as 13-bit, 2k-aligned. */
-        unsigned int offset           : 14;
-        unsigned int reserved         : 11; /* 12-bits in Utah-driver */
-        unsigned int zBufWidthInTiles : 6;
-        unsigned int zDepthSelect     : 1;
+        unsigned offset           : 14;
+        unsigned reserved         : 11; /* 12-bits in Utah-driver */
+        unsigned zBufWidthInTiles : 6;
+        unsigned zDepthSelect     : 1;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegZBufOffset;
 
 /* The layout of this reg is the same on Savage4 and Savage3D. */
@@ -491,16 +488,16 @@ typedef union
 {
     struct
     {
-        unsigned int rLow      : 6;
-        unsigned int reserved1 : 2;
-        unsigned int rHigh     : 6;
-        unsigned int reserved2 : 2;
-        unsigned int wLow      : 6;
-        unsigned int reserved3 : 2;
-        unsigned int wHigh     : 6;
-        unsigned int reserved4 : 2;
+        unsigned rLow      : 6;
+        unsigned reserved1 : 2;
+        unsigned rHigh     : 6;
+        unsigned reserved2 : 2;
+        unsigned wLow      : 6;
+        unsigned reserved3 : 2;
+        unsigned wHigh     : 6;
+        unsigned reserved4 : 2;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegZWatermarks;
 
 /********************************
@@ -511,14 +508,14 @@ typedef union
 {
     struct
     {
-        unsigned int fogClr      : 24;
-        unsigned int expShift    : 3;
-        unsigned int reserved    : 1;
-        unsigned int fogEn       : 1;
-        unsigned int fogMode     : 1;
-        unsigned int fogEndShift : 2;
+        unsigned fogClr      : 24;
+        unsigned expShift    : 3;
+        unsigned reserved    : 1;
+        unsigned fogEn       : 1;
+        unsigned fogMode     : 1;
+        unsigned fogEndShift : 2;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegFogCtrl;
 
 /*not in spec, but tempo for pp and driver*/
@@ -526,10 +523,10 @@ typedef union
 {
     struct
     {
-        unsigned int fogDensity : 16;
-        unsigned int fogStart   : 16;
+        unsigned fogDensity : 16;
+        unsigned fogStart   : 16;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegFogParam;
 
 /**************************************
@@ -541,19 +538,19 @@ typedef union
 {
     struct
     {
-        unsigned int dstWidthInTile :  7;
-        unsigned int reserved       :  1;
+        unsigned dstWidthInTile :  7;
+        unsigned reserved       :  1;
 	/* In the Utah-Driver the offset is defined as 13-bit, 2k-aligned. */
-        unsigned int offset         : 14;
-        unsigned int reserved1      :  7;
+        unsigned offset         : 14;
+        unsigned reserved1      :  7;
 	/* antiAliasMode does not exist in the Utah-driver. But it includes the
 	 * high bit of this in the destPixFmt. However, only values 0 and 2
 	 * are used as dstPixFmt, so antiAliasMode is effectively always 0
 	 * in the Utah-driver. In other words, treat as reserved on Savage3D.*/
-        unsigned int antiAliasMode  :  2;
-        unsigned int dstPixFmt      :  1;
+        unsigned antiAliasMode  :  2;
+        unsigned dstPixFmt      :  1;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegDestCtrl;
 
 /* The layout of this reg on Savage4 and Savage3D are very similar. */
@@ -561,18 +558,18 @@ typedef union
 {
     struct
     {
-        unsigned int destReadLow   : 6;
-        unsigned int destReadHigh  : 6;
-        unsigned int destWriteLow  : 6;
-        unsigned int destWriteHigh : 6;
-        unsigned int texRead       : 4;
-        unsigned int reserved4     : 2;
+        unsigned destReadLow   : 6;
+        unsigned destReadHigh  : 6;
+        unsigned destWriteLow  : 6;
+        unsigned destWriteHigh : 6;
+        unsigned texRead       : 4;
+        unsigned reserved4     : 2;
 	/* The Utah-driver calls this pixel FIFO length:
 	 * 00 - 240, 01 - 180, 10 - 120, 11 - 60
 	 * However, it is not used in either driver. */
-        unsigned int destFlush     : 2;
+        unsigned destFlush     : 2;
     }ni;
-    unsigned int ui;
+    uint32_t ui;
 } savageRegDestTexWatermarks;
 
 /* Savage4/Twister/ProSavage register BCI addresses */
@@ -617,7 +614,7 @@ typedef union
 #define SAVAGE_FIRST_REG 0x18
 #define SAVAGE_NR_REGS   34
 typedef struct savage_registers_s4_t {
-    unsigned int               unused1[6];        /* 0x18-0x1d */
+    uint32_t                   unused1[6];        /* 0x18-0x1d */
     savageRegDrawLocalCtrl     drawLocalCtrl;     /* 0x1e */
     savageRegTexPalAddr        texPalAddr;        /* 0x1f */
     savageRegTexCtrl_s4        texCtrl[2];        /* 0x20, 0x21 */
@@ -625,7 +622,7 @@ typedef struct savage_registers_s4_t {
     savageRegTexBlendCtrl      texBlendCtrl[2];   /* 0x24, 0x25 */
     savageRegTexXprClr         texXprClr;         /* 0x26 */
     savageRegTexDescr_s4       texDescr;          /* 0x27 */
-    unsigned char              fogTable[32];      /* 0x28-0x2f (8dwords) */
+    uint8_t                    fogTable[32];      /* 0x28-0x2f (8dwords) */
     savageRegFogCtrl           fogCtrl;           /* 0x30 */
     savageRegStencilCtrl       stencilCtrl;       /* 0x31 */
     savageRegZBufCtrl_s4       zBufCtrl;          /* 0x32 */
@@ -643,8 +640,8 @@ typedef struct savage_registers_s3d_t {
     savageRegTexAddr           texAddr;           /* 0x1a */
     savageRegTexDescr_s3d      texDescr;          /* 0x1b */
     savageRegTexCtrl_s3d       texCtrl;           /* 0x1c */
-    unsigned int               unused1[3];        /* 0x1d-0x1f */
-    unsigned char              fogTable[64];      /* 0x20-0x2f (16dwords) */
+    uint32_t                   unused1[3];        /* 0x1d-0x1f */
+    uint8_t                    fogTable[64];      /* 0x20-0x2f (16dwords) */
     savageRegFogCtrl           fogCtrl;           /* 0x30 */
     savageRegDrawCtrl          drawCtrl;          /* 0x31 */
     savageRegZBufCtrl_s3d      zBufCtrl;          /* 0x32 */
@@ -654,12 +651,12 @@ typedef struct savage_registers_s3d_t {
     savageRegScissorsEnd       scissorsEnd;       /* 0x36 */
     savageRegZWatermarks       zWatermarks;       /* 0x37 */
     savageRegDestTexWatermarks destTexWatermarks; /* 0x38 */
-    unsigned int               unused2;           /* 0x39 */
+    uint32_t                   unused2;           /* 0x39 */
 } savageRegistersS3D;
 typedef union savage_registers_t {
     savageRegistersS4  s4;
     savageRegistersS3D s3d;
-    unsigned int       ui[SAVAGE_NR_REGS];
+    uint32_t           ui[SAVAGE_NR_REGS];
 } savageRegisters;
 
 
diff --git a/src/mesa/drivers/dri/savage/savagedma.c b/src/mesa/drivers/dri/savage/savagedma.c
index 9b0bdc8b9f..fb0ec87903 100644
--- a/src/mesa/drivers/dri/savage/savagedma.c
+++ b/src/mesa/drivers/dri/savage/savagedma.c
@@ -85,7 +85,7 @@ void *savageDMAAlloc (savageContextPtr imesa, GLuint size) {
     /* make sure that everything has been filled in and committed */
     assert (dmaBuff->end == dmaBuff->allocEnd);
 
-    size *= sizeof (GLuint); /* size in bytes */
+    size *= sizeof (uint32_t); /* size in bytes */
     if (dmaBuff->kickFlag == GL_TRUE) {
 	if (size > DMA_PAGE_SIZE)
 	    return NULL;
@@ -102,9 +102,9 @@ void *savageDMAAlloc (savageContextPtr imesa, GLuint size) {
 
 /* Flush DMA buffer via DMA */
 void savageDMAFlush (savageContextPtr imesa) {
-    volatile GLuint* BCIbase;
+    volatile uint32_t* BCIbase;
     DMABufferPtr dmaBuff = &imesa->DMABuf;
-    GLuint phyAddress;
+    uint32_t phyAddress;
     GLuint dmaCount, dmaCount1, remain;
     int i;
 
@@ -117,7 +117,7 @@ void savageDMAFlush (savageContextPtr imesa) {
       return;
 
     /* get bci base */
-    BCIbase = (volatile GLuint *)SAVAGE_GET_BCI_POINTER(imesa,4);
+    BCIbase = (volatile uint32_t *)SAVAGE_GET_BCI_POINTER(imesa,4);
 
     /* set the eventtag */
     *BCIbase = (dmaBuff->usingPage & 0xffffL) | (CMD_UpdateShadowStat << 27)
@@ -136,7 +136,7 @@ void savageDMAFlush (savageContextPtr imesa) {
     dmaCount1 = (dmaCount + 31UL) & ~31UL;
     remain = (dmaCount1 - dmaCount) >> 2;
     for (i = 0; i < remain; i++) {
-        *((GLuint *)dmaBuff->end) = 0x40000000L;
+        *((uint32_t *)dmaBuff->end) = 0x40000000L;
         dmaBuff->end+=4;
     }
     dmaCount = (dmaCount1 >> 3) - 1;
@@ -227,7 +227,7 @@ void *savageDMAAlloc (savageContextPtr imesa, GLuint size) {
     /* make sure that everything has been filled in and committed */
     assert (dmaBuff->end == dmaBuff->allocEnd);
 
-    size *= sizeof (GLuint); /* size in bytes */
+    size *= sizeof (uint32_t); /* size in bytes */
     if (dmaBuff->end + size >= dmaBuff->buf->linear + DMA_PAGE_SIZE) {
 	/* need kick off */
 	savageDMAFlush (imesa);
@@ -238,9 +238,9 @@ void *savageDMAAlloc (savageContextPtr imesa, GLuint size) {
 
 /* Flush DMA buffer via BCI (faked DMA) */
 void savageDMAFlush(savageContextPtr imesa) {
-    volatile GLuint* BCIbase;
+    volatile uint32_t* BCIbase;
     DMABufferPtr dmaBuff = &imesa->DMABuf;
-    GLuint *entry;
+    uint32_t *entry;
 
     /* make sure that everything has been filled in and committed */
     assert (dmaBuff->allocEnd == dmaBuff->end);
@@ -249,11 +249,11 @@ void savageDMAFlush(savageContextPtr imesa) {
       return;
 
     /* get bci base */
-    BCIbase = (volatile GLuint *)SAVAGE_GET_BCI_POINTER(
-	imesa, (dmaBuff->end - dmaBuff->start) / sizeof (GLuint));
+    BCIbase = (volatile uint32_t *)SAVAGE_GET_BCI_POINTER(
+	imesa, (dmaBuff->end - dmaBuff->start) / sizeof (uint32_t));
 
-    for (entry = (GLuint *)dmaBuff->start;
-	 entry < (GLuint *)dmaBuff->end; ++entry)
+    for (entry = (uint32_t *)dmaBuff->start;
+	 entry < (uint32_t *)dmaBuff->end; ++entry)
 	*BCIbase = *entry;
 
     dmaBuff->end = dmaBuff->allocEnd = dmaBuff->start;
diff --git a/src/mesa/drivers/dri/savage/savageioctl.c b/src/mesa/drivers/dri/savage/savageioctl.c
index 94db5ab3d2..95cbeecbfa 100644
--- a/src/mesa/drivers/dri/savage/savageioctl.c
+++ b/src/mesa/drivers/dri/savage/savageioctl.c
@@ -63,7 +63,7 @@ static void savage_BCI_clear(GLcontext *ctx, drm_savage_clear_t *pclear)
 		unsigned int y = pbox->y1;
 		unsigned int width = pbox->x2 - x;
 		unsigned int height = pbox->y2 - y;
- 		unsigned int *bciptr;		
+ 		uint32_t *bciptr;
 
 		if (pbox->x1 > pbox->x2 ||
 		    pbox->y1 > pbox->y2 ||
@@ -73,27 +73,27 @@ static void savage_BCI_clear(GLcontext *ctx, drm_savage_clear_t *pclear)
 
 	   	if ( (pclear->flags & SAVAGE_FRONT) && imesa->IsFullScreen) {
 		        bciptr = savageDMAAlloc (imesa, 8);
-			WRITE_CMD((bciptr) , 0x4BCC8C00,GLuint);
-			WRITE_CMD((bciptr) , imesa->savageScreen->frontOffset,GLuint);
-			WRITE_CMD((bciptr) , imesa->savageScreen->frontBitmapDesc,GLuint);
-			WRITE_CMD((bciptr) , pclear->clear_color,GLuint);
-			WRITE_CMD((bciptr) , (y <<16) | x,GLuint);
-			WRITE_CMD((bciptr) , (height << 16) | width,GLuint);
+			WRITE_CMD((bciptr) , 0x4BCC8C00,uint32_t);
+			WRITE_CMD((bciptr) , imesa->savageScreen->frontOffset,uint32_t);
+			WRITE_CMD((bciptr) , imesa->savageScreen->frontBitmapDesc,uint32_t);
+			WRITE_CMD((bciptr) , pclear->clear_color,uint32_t);
+			WRITE_CMD((bciptr) , (y <<16) | x,uint32_t);
+			WRITE_CMD((bciptr) , (height << 16) | width,uint32_t);
 			savageDMACommit (imesa, bciptr);
 		}
 		else if ( pclear->flags & (SAVAGE_BACK|SAVAGE_FRONT) ) {
 		        bciptr = savageDMAAlloc (imesa, 8);
-			WRITE_CMD((bciptr) , 0x4BCC8C00,GLuint);
-			WRITE_CMD((bciptr) , imesa->savageScreen->backOffset,GLuint);
-			WRITE_CMD((bciptr) , imesa->savageScreen->backBitmapDesc,GLuint);
-			WRITE_CMD((bciptr) , pclear->clear_color,GLuint);
-			WRITE_CMD((bciptr) , (y <<16) | x,GLuint);
-			WRITE_CMD((bciptr) , (height << 16) | width,GLuint);
+			WRITE_CMD((bciptr) , 0x4BCC8C00,uint32_t);
+			WRITE_CMD((bciptr) , imesa->savageScreen->backOffset,uint32_t);
+			WRITE_CMD((bciptr) , imesa->savageScreen->backBitmapDesc,uint32_t);
+			WRITE_CMD((bciptr) , pclear->clear_color,uint32_t);
+			WRITE_CMD((bciptr) , (y <<16) | x,uint32_t);
+			WRITE_CMD((bciptr) , (height << 16) | width,uint32_t);
 			savageDMACommit (imesa, bciptr);
 		}
 		
 		if ( pclear->flags & (SAVAGE_DEPTH |SAVAGE_STENCIL) ) {
-		        GLuint writeMask = 0x0;
+		        uint32_t writeMask = 0x0;
 #if HW_STENCIL		
 		        if(imesa->hw_stencil)
 		        {        
@@ -128,8 +128,8 @@ static void savage_BCI_clear(GLcontext *ctx, drm_savage_clear_t *pclear)
 				bciptr = savageDMAAlloc (imesa, 10);
 			        if(writeMask != 0xFFFFFFFF)
 			        {
-                                    WRITE_CMD((bciptr) , 0x960100D7,GLuint);
-                                    WRITE_CMD((bciptr) , writeMask,GLuint);  
+                                    WRITE_CMD((bciptr) , 0x960100D7,uint32_t);
+                                    WRITE_CMD((bciptr) , writeMask,uint32_t);
                                 }
                             }
 			    else
@@ -138,19 +138,19 @@ static void savage_BCI_clear(GLcontext *ctx, drm_savage_clear_t *pclear)
 				bciptr = savageDMAAlloc (imesa, 6);
 			    }
 
-			    WRITE_CMD((bciptr) , 0x4BCC8C00,GLuint);
-			    WRITE_CMD((bciptr) , imesa->savageScreen->depthOffset,GLuint);
-			    WRITE_CMD((bciptr) , imesa->savageScreen->depthBitmapDesc,GLuint);
-			    WRITE_CMD((bciptr) , pclear->clear_depth,GLuint);
-			    WRITE_CMD((bciptr) , (y <<16) | x,GLuint);
-			    WRITE_CMD((bciptr) , (height << 16) | width,GLuint);
+			    WRITE_CMD((bciptr) , 0x4BCC8C00,uint32_t);
+			    WRITE_CMD((bciptr) , imesa->savageScreen->depthOffset,uint32_t);
+			    WRITE_CMD((bciptr) , imesa->savageScreen->depthBitmapDesc,uint32_t);
+			    WRITE_CMD((bciptr) , pclear->clear_depth,uint32_t);
+			    WRITE_CMD((bciptr) , (y <<16) | x,uint32_t);
+			    WRITE_CMD((bciptr) , (height << 16) | width,uint32_t);
 #if HW_STENCIL			    
 			    if(imesa->hw_stencil)
 			    {
 			        if(writeMask != 0xFFFFFFFF)
 			        {
-			           WRITE_CMD((bciptr) , 0x960100D7,GLuint);
-                                   WRITE_CMD((bciptr) , 0xFFFFFFFF,GLuint);  
+			           WRITE_CMD((bciptr) , 0x960100D7,uint32_t);
+                                   WRITE_CMD((bciptr) , 0xFFFFFFFF,uint32_t);  
 			        }
 			    }
 #endif
@@ -170,7 +170,7 @@ static void savage_BCI_swap(savageContextPtr imesa)
     int nbox = imesa->sarea->nbox;
     drm_clip_rect_t *pbox = imesa->sarea->boxes;
     int i;
-    volatile unsigned int *bciptr;
+    volatile uint32_t *bciptr;
     
     if (nbox > SAVAGE_NR_SAREA_CLIPRECTS)
         nbox = SAVAGE_NR_SAREA_CLIPRECTS;
diff --git a/src/mesa/drivers/dri/savage/savagestate.c b/src/mesa/drivers/dri/savage/savagestate.c
index 9b9488c290..5e79e4abf1 100644
--- a/src/mesa/drivers/dri/savage/savagestate.c
+++ b/src/mesa/drivers/dri/savage/savagestate.c
@@ -1433,12 +1433,12 @@ static GLboolean savageGlobalRegChanged (savageContextPtr imesa,
 static void savageEmitContiguousRegs (savageContextPtr imesa,
 				      GLuint first, GLuint last) {
     GLuint i;
-    GLuint *pBCIBase;
+    uint32_t *pBCIBase;
     pBCIBase = savageDMAAlloc (imesa, last - first + 2);
-    WRITE_CMD (pBCIBase, SET_REGISTER(first, last - first + 1), GLuint);
+    WRITE_CMD (pBCIBase, SET_REGISTER(first, last - first + 1), uint32_t);
 
     for (i = first - SAVAGE_FIRST_REG; i <= last - SAVAGE_FIRST_REG; ++i) {
-	WRITE_CMD (pBCIBase, imesa->regs.ui[i], GLuint);
+	WRITE_CMD (pBCIBase, imesa->regs.ui[i], uint32_t);
 	imesa->oldRegs.ui[i] = imesa->regs.ui[i];
     }
     savageDMACommit (imesa, pBCIBase);
@@ -1463,9 +1463,19 @@ static void savageEmitChangedRegs (savageContextPtr imesa,
 	savageEmitContiguousRegs (imesa, firstChanged+SAVAGE_FIRST_REG,
 				  last);
 }
+static void savageEmitChangedRegChunk (savageContextPtr imesa,
+				       GLuint first, GLuint last) {
+    GLuint i;
+    for (i = first - SAVAGE_FIRST_REG; i <= last - SAVAGE_FIRST_REG; ++i) {
+	if (imesa->oldRegs.ui[i] != imesa->regs.ui[i]) {
+	    savageEmitContiguousRegs (imesa, first, last);
+	    break;
+	}
+    }
+}
 static void savageUpdateRegister_s4(savageContextPtr imesa)
 {
-    GLuint *pBCIBase;
+    uint32_t *pBCIBase;
 
     /*
      * Scissors updates drawctrl0 and drawctrl 1
@@ -1488,10 +1498,11 @@ static void savageUpdateRegister_s4(savageContextPtr imesa)
         }
     }
 
-    /* the savage4 uses the contiguous range of BCI registers 0x1e-0x39 */
-    if (imesa->lostContext || savageGlobalRegChanged (imesa, 0x1e, 0x39)) {
+    /* the savage4 uses the contiguous range of BCI registers 0x1e-0x39
+     * 0x1e-0x27 are local, no need to check them for global changes */
+    if (imesa->lostContext || savageGlobalRegChanged (imesa, 0x28, 0x39)) {
 	pBCIBase = savageDMAAlloc (imesa, 1);
-        WRITE_CMD (pBCIBase, WAIT_3D_IDLE, GLuint);
+        WRITE_CMD (pBCIBase, WAIT_3D_IDLE, uint32_t);
 	savageDMACommit (imesa, pBCIBase);
     }
     if (imesa->lostContext)
@@ -1504,7 +1515,7 @@ static void savageUpdateRegister_s4(savageContextPtr imesa)
 }
 static void savageUpdateRegister_s3d(savageContextPtr imesa)
 {
-    GLuint *pBCIBase;
+    uint32_t *pBCIBase;
 
     if (imesa->scissorChanged)
     {
@@ -1541,19 +1552,18 @@ static void savageUpdateRegister_s3d(savageContextPtr imesa)
      * 0x18-0x1c and 0x20-0x38. The first range is local. */
     if (imesa->lostContext || savageGlobalRegChanged (imesa, 0x20, 0x38)) {
 	pBCIBase = savageDMAAlloc (imesa, 1);
-        WRITE_CMD (pBCIBase, WAIT_3D_IDLE, GLuint);
+        WRITE_CMD (pBCIBase, WAIT_3D_IDLE, uint32_t);
 	savageDMACommit (imesa, pBCIBase);
     }
     /* FIXME: watermark registers aren't programmed correctly ATM */
-    /* Emitting only changed registers introduces strange texturing errors
-     * on my SavageIX. Emit them all to be on the safe side.
-     * FIXME: might be smarter to emit all texture regs if one changed and
-     * all other regs independently, if one of them changed. */
-    if (1 || imesa->lostContext) {
+    if (imesa->lostContext) {
 	savageEmitContiguousRegs (imesa, 0x18, 0x1c);
 	savageEmitContiguousRegs (imesa, 0x20, 0x36);
     } else {
-	savageEmitChangedRegs (imesa, 0x18, 0x1c);
+	/* On the Savage IX texture registers (at least some of them)
+	 * have to be emitted as one chunk. */
+	savageEmitChangedRegs (imesa, 0x18, 0x19);
+	savageEmitChangedRegChunk (imesa, 0x1a, 0x1c);
 	savageEmitChangedRegs (imesa, 0x20, 0x36);
     }
 
@@ -1702,12 +1712,31 @@ static void savageDDInitState_s3d( savageContextPtr imesa )
     imesa->LcsCullMode = BCM_None;
     imesa->regs.s3d.texDescr.ni.palSize          = TPS_256;
 
-    /* on savage3d all registers are global for now */
+    /* clear the local registers in the global reg mask */
+    imesa->globalRegMask.s3d.texPalAddr.ui = 0;
+    imesa->globalRegMask.s3d.texXprClr.ui  = 0;
+    imesa->globalRegMask.s3d.texAddr.ui    = 0;
+    imesa->globalRegMask.s3d.texDescr.ui   = 0;
+    imesa->globalRegMask.s3d.texCtrl.ui    = 0;
+
+    imesa->globalRegMask.s3d.fogCtrl.ui = 0;
+
+    /* drawCtrl is local with some exceptions */
+    imesa->globalRegMask.s3d.drawCtrl.ui = 0;
+    imesa->globalRegMask.s3d.drawCtrl.ni.cullMode = 0x3;
+    imesa->globalRegMask.s3d.drawCtrl.ni.alphaTestCmpFunc = 0x7;
+    imesa->globalRegMask.s3d.drawCtrl.ni.alphaTestEn = 0x1;
+    imesa->globalRegMask.s3d.drawCtrl.ni.alphaRefVal = 0xff;
+
+    /* zBufCtrl is local with some exceptions */
+    imesa->globalRegMask.s3d.zBufCtrl.ui = 0;
+    imesa->globalRegMask.s3d.zBufCtrl.ni.zCmpFunc = 0x7;
+    imesa->globalRegMask.s3d.zBufCtrl.ni.zBufEn = 0x1;
 }
 void savageDDInitState( savageContextPtr imesa ) {
-    memset (imesa->regs.ui, 0, SAVAGE_NR_REGS*sizeof(GLuint));
-    memset (imesa->oldRegs.ui, 0, SAVAGE_NR_REGS*sizeof(GLuint));
-    memset (imesa->globalRegMask.ui, 0xff, SAVAGE_NR_REGS*sizeof(GLuint));
+    memset (imesa->regs.ui, 0, SAVAGE_NR_REGS*sizeof(uint32_t));
+    memset (imesa->oldRegs.ui, 0, SAVAGE_NR_REGS*sizeof(uint32_t));
+    memset (imesa->globalRegMask.ui, 0xff, SAVAGE_NR_REGS*sizeof(uint32_t));
     if (imesa->savageScreen->chipset >= S3_SAVAGE4)
 	savageDDInitState_s4 (imesa);
     else
diff --git a/src/mesa/drivers/dri/savage/savagetex.c b/src/mesa/drivers/dri/savage/savagetex.c
index b7473469dc..541de5bf86 100644
--- a/src/mesa/drivers/dri/savage/savagetex.c
+++ b/src/mesa/drivers/dri/savage/savagetex.c
@@ -1070,7 +1070,7 @@ static void savageUpdateTex0State_s4( GLcontext *ctx )
     if (imesa->regs.s4.texDescr.ni.tex1En)
         imesa->regs.s4.texDescr.ni.texBLoopEn = GL_TRUE;
 
-    imesa->regs.s4.texAddr[0].ui = (GLuint) t->texParams.hwPhysAddress | 0x2;
+    imesa->regs.s4.texAddr[0].ui = (uint32_t) t->texParams.hwPhysAddress | 0x2;
     if(t->heap == SAVAGE_AGP_HEAP)
 	imesa->regs.s4.texAddr[0].ui |= 0x1;
     
@@ -1270,7 +1270,7 @@ static void savageUpdateTex1State_s4( GLcontext *ctx )
     imesa->regs.s4.texCtrl[1].ni.dMax = t->max_level;
     imesa->regs.s4.texDescr.ni.texBLoopEn = GL_TRUE;
 
-    imesa->regs.s4.texAddr[1].ui = (GLuint) t->texParams.hwPhysAddress| 2;
+    imesa->regs.s4.texAddr[1].ui = (uint32_t) t->texParams.hwPhysAddress| 2;
     if(t->heap == SAVAGE_AGP_HEAP)
 	imesa->regs.s4.texAddr[1].ui |= 0x1;
 }
@@ -1410,14 +1410,9 @@ static void savageUpdateTexState_s3d( GLcontext *ctx )
     assert (t->image[0].internalFormat <= 7);
     imesa->regs.s3d.texDescr.ni.texFmt = t->image[0].internalFormat;
 
-    imesa->regs.s3d.texAddr.ni.addr = (GLuint) t->texParams.hwPhysAddress >> 3;
-    if(t->heap == SAVAGE_AGP_HEAP) {
-	imesa->regs.s3d.texAddr.ni.inSysTex = 1;
-	imesa->regs.s3d.texAddr.ni.inAGPTex = 1;
-    } else {
-	imesa->regs.s3d.texAddr.ni.inSysTex = 0;
-	imesa->regs.s3d.texAddr.ni.inAGPTex = 1;
-    }
+    imesa->regs.s3d.texAddr.ui = (uint32_t) t->texParams.hwPhysAddress| 2;
+    if(t->heap == SAVAGE_AGP_HEAP)
+	imesa->regs.s3d.texAddr.ui |= 0x1;
 }
 
 
diff --git a/src/mesa/drivers/dri/savage/savagetris.c b/src/mesa/drivers/dri/savage/savagetris.c
index c9a7145605..8347580e86 100644
--- a/src/mesa/drivers/dri/savage/savagetris.c
+++ b/src/mesa/drivers/dri/savage/savagetris.c
@@ -61,12 +61,12 @@ static void savageRenderPrimitive( GLcontext *ctx, GLenum prim );
  *                    Emit primitives                                  *
  ***********************************************************************/
 
-static  __inline__ GLuint * savage_send_one_vertex(savageContextPtr imesa, savageVertexPtr v, GLuint * vb, GLuint start, GLuint size)
+static  __inline__ GLuint * savage_send_one_vertex(savageContextPtr imesa, savageVertexPtr v, uint32_t * vb, GLuint start, GLuint size)
 { 
     GLuint j; 
     for (j = start ; j < size ; j++) 
     { 
-        WRITE_CMD(vb, v->ui[j],GLuint); 
+        WRITE_CMD(vb, v->ui[j],uint32_t);
     }
     return vb; 
 } 
@@ -78,14 +78,14 @@ static void __inline__ savage_draw_triangle( savageContextPtr imesa,
 { 
    GLuint vertsize = imesa->vertex_size; 
 #if SAVAGEDEBUG
-   GLuint *vb = savageDMAAlloc (imesa, 3 * vertsize + 1 + 8); 
+   uint32_t *vb = savageDMAAlloc (imesa, 3 * vertsize + 1 + 8); 
 #else
-   GLuint *vb = savageDMAAlloc (imesa, 4 * vertsize + 1); 
+   uint32_t *vb = savageDMAAlloc (imesa, 4 * vertsize + 1); 
 #endif
 
    imesa->DrawPrimitiveCmd &=
        ~(SAVAGE_HW_TRIANGLE_TYPE| SAVAGE_HW_TRIANGLE_CONT);
-   WRITE_CMD(vb,SAVAGE_DRAW_PRIMITIVE(3, imesa->DrawPrimitiveCmd, 0),GLuint);
+   WRITE_CMD(vb,SAVAGE_DRAW_PRIMITIVE(3, imesa->DrawPrimitiveCmd, 0),uint32_t);
 
    vb = savage_send_one_vertex(imesa, v0, vb, 0, vertsize);
    vb = savage_send_one_vertex(imesa, v1, vb, 0, vertsize);
@@ -120,8 +120,8 @@ static __inline__ void savage_draw_point( savageContextPtr imesa,
 					  savageVertexPtr tmp ) 
 { 
    GLfloat sz = imesa->glCtx->Point._Size * .5;
-   int vertsize = imesa->vertex_size; 
-   GLuint *vb = savageDMAAlloc (imesa, 4 * vertsize + 1); 
+   GLuint vertsize = imesa->vertex_size; 
+   uint32_t *vb = savageDMAAlloc (imesa, 4 * vertsize + 1); 
    const GLfloat x = tmp->v.x; 
    const GLfloat y = tmp->v.y; 
    
@@ -129,7 +129,7 @@ static __inline__ void savage_draw_point( savageContextPtr imesa,
        ~(SAVAGE_HW_TRIANGLE_TYPE | SAVAGE_HW_TRIANGLE_CONT);   
    imesa->DrawPrimitiveCmd |= SAVAGE_HW_TRIANGLE_FAN; 
      
-   WRITE_CMD(vb, SAVAGE_DRAW_PRIMITIVE(4, imesa->DrawPrimitiveCmd, 0),GLuint);
+   WRITE_CMD(vb, SAVAGE_DRAW_PRIMITIVE(4, imesa->DrawPrimitiveCmd, 0),uint32_t);
 
    WRITE_CMD(vb, x - sz, GLfloat);
    WRITE_CMD(vb, y - sz, GLfloat);
@@ -156,14 +156,14 @@ static __inline__ void savage_draw_line( savageContextPtr imesa,
 				       savageVertexPtr v1 ) 
 {  
    GLuint vertsize = imesa->vertex_size; 
-   GLuint *vb = savageDMAAlloc (imesa, 4 * vertsize + 1); 
+   uint32_t *vb = savageDMAAlloc (imesa, 4 * vertsize + 1); 
    GLfloat dx, dy, ix, iy; 
    GLfloat width = imesa->glCtx->Line._Width;
 
    imesa->DrawPrimitiveCmd &=
        ~(SAVAGE_HW_TRIANGLE_TYPE | SAVAGE_HW_TRIANGLE_CONT);
    imesa->DrawPrimitiveCmd |= SAVAGE_HW_TRIANGLE_FAN; 
-   WRITE_CMD(vb, SAVAGE_DRAW_PRIMITIVE(4, imesa->DrawPrimitiveCmd, 0),GLuint);
+   WRITE_CMD(vb, SAVAGE_DRAW_PRIMITIVE(4, imesa->DrawPrimitiveCmd, 0),uint32_t);
 
    dx = v0->v.x - v1->v.x;
    dy = v0->v.y - v1->v.y;
@@ -199,11 +199,11 @@ static void __inline__ savage_draw_quad( savageContextPtr imesa,
 					 savageVertexPtr v3 ) 
 { 
    GLuint vertsize = imesa->vertex_size; 
-   GLuint *vb = savageDMAAlloc (imesa, 6 * vertsize + 1); 
+   uint32_t *vb = savageDMAAlloc (imesa, 6 * vertsize + 1); 
 
    imesa->DrawPrimitiveCmd &=
        ~(SAVAGE_HW_TRIANGLE_TYPE | SAVAGE_HW_TRIANGLE_CONT);
-   WRITE_CMD(vb, SAVAGE_DRAW_PRIMITIVE(6, imesa->DrawPrimitiveCmd, 0),GLuint);
+   WRITE_CMD(vb, SAVAGE_DRAW_PRIMITIVE(6, imesa->DrawPrimitiveCmd, 0),uint32_t);
  
    vb = savage_send_one_vertex(imesa, v0, vb, 0, vertsize);
    vb = savage_send_one_vertex(imesa, v1, vb, 0, vertsize);