diff options
| author | Oliver McFadden <z3ro.geek@gmail.com> | 2008-02-28 09:39:09 +0000 |
|---|---|---|
| committer | Oliver McFadden <z3ro.geek@gmail.com> | 2008-03-01 06:33:06 +0000 |
| commit | dda906fcdbc2c1daa6de12873998290a1486138e (patch) | |
| tree | ec806c2bc8b6facf83e5e45fd6d81c4746a79ed6 | |
| parent | 7504981074c43f057176ffc6cc54754fae903a98 (diff) | |
r300: Prefer to use the VE_ADD for simple MOV style opcodes.
The VE_MULTIPLY_ADD has further restrictions on reading temporary memory which
may complicate things. See AMD's documentation.
| -rw-r--r-- | src/mesa/drivers/dri/r300/r300_vertprog.c | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_vertprog.c b/src/mesa/drivers/dri/r300/r300_vertprog.c index 1b76d4bae2..4c7cafe9bf 100644 --- a/src/mesa/drivers/dri/r300/r300_vertprog.c +++ b/src/mesa/drivers/dri/r300/r300_vertprog.c @@ -387,15 +387,6 @@ static GLuint *t_opcode_add(struct r300_vertex_program *vp, struct prog_instruction *vpi, GLuint * inst, struct prog_src_register src[3]) { -#if 1 - inst[0] = - PVS_VECTOR_OPCODE(VE_MULTIPLY_ADD, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), - t_dst_class(vpi->DstReg.File)); - inst[1] = ONE_SRC_0; - inst[2] = t_src(vp, &src[0]); - inst[3] = t_src(vp, &src[1]); -#else inst[0] = PVS_VECTOR_OPCODE(VE_ADD, t_dst_index(vp, &vpi->DstReg), t_dst_mask(vpi->DstReg.WriteMask), @@ -403,7 +394,6 @@ static GLuint *t_opcode_add(struct r300_vertex_program *vp, inst[1] = t_src(vp, &src[0]); inst[2] = t_src(vp, &src[1]); inst[3] = ZERO_SRC_1; -#endif return inst; } @@ -738,7 +728,6 @@ static GLuint *t_opcode_mov(struct r300_vertex_program *vp, { //ADD RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{} {ZERO ZERO ZERO ZERO} -#if 1 inst[0] = PVS_VECTOR_OPCODE(VE_ADD, t_dst_index(vp, &vpi->DstReg), t_dst_mask(vpi->DstReg.WriteMask), @@ -746,15 +735,6 @@ static GLuint *t_opcode_mov(struct r300_vertex_program *vp, inst[1] = t_src(vp, &src[0]); inst[2] = ZERO_SRC_0; inst[3] = ZERO_SRC_0; -#else - inst[0] = - PVS_VECTOR_OPCODE(VE_MULTIPLY_ADD, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), - t_dst_class(vpi->DstReg.File)); - inst[1] = t_src(vp, &src[0]); - inst[2] = ONE_SRC_0; - inst[3] = ZERO_SRC_0; -#endif return inst; } @@ -905,7 +885,6 @@ static GLuint *t_opcode_swz(struct r300_vertex_program *vp, { //ADD RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{} {ZERO ZERO ZERO ZERO} -#if 1 inst[0] = PVS_VECTOR_OPCODE(VE_ADD, t_dst_index(vp, &vpi->DstReg), t_dst_mask(vpi->DstReg.WriteMask), @@ -913,15 +892,6 @@ static GLuint *t_opcode_swz(struct r300_vertex_program *vp, inst[1] = t_src(vp, &src[0]); inst[2] = ZERO_SRC_0; inst[3] = ZERO_SRC_0; -#else - inst[0] = - PVS_VECTOR_OPCODE(VE_MULTIPLY_ADD, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), - t_dst_class(vpi->DstReg.File)); - inst[1] = t_src(vp, &src[0]); - inst[2] = ONE_SRC_0; - inst[3] = ZERO_SRC_0; -#endif return inst; } |