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authorRoland Scheidegger <sroland@vmware.com>2009-06-26 20:38:07 +0200
committerRoland Scheidegger <sroland@vmware.com>2009-07-04 15:35:07 +0200
commitfc6e02ce6210d6615af0058f1b57e7ee37a6527f (patch)
treec4a4fb3ecc2969e2f5e77ec4a8a2f9e5118d9927
parentc30f23c1231e8443e0880efa5326ccecf6eec034 (diff)
i965: fix fetching constants from constant buffer in glsl path
the driver used to overwrite grf0 then use implicit move by send instruction to move contents of grf0 to mrf1. However, we must not overwrite grf0 since it's still used later for fb write. Instead, do the move directly do mrf1 (we could use implicit move from another grf reg to mrf1 but since we need a mov to encode the data anyway it doesn't seem to make sense). I think the dp_READ/WRITE_16 functions may suffer from the same issue. While here also remove unnecessary msg_reg_nr parameter from the dataport functions since always message register 1 is used.
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu.h3
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu_emit.c27
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_emit.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_glsl.c1
4 files changed, 16 insertions, 17 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 62c98bd8bb..003332f78c 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -855,12 +855,10 @@ void brw_math( struct brw_compile *p,
void brw_dp_READ_16( struct brw_compile *p,
struct brw_reg dest,
- GLuint msg_reg_nr,
GLuint scratch_offset );
void brw_dp_READ_4( struct brw_compile *p,
struct brw_reg dest,
- GLuint msg_reg_nr,
GLboolean relAddr,
GLuint location,
GLuint bind_table_index );
@@ -875,7 +873,6 @@ void brw_dp_READ_4_vs( struct brw_compile *p,
void brw_dp_WRITE_16( struct brw_compile *p,
struct brw_reg src,
- GLuint msg_reg_nr,
GLuint scratch_offset );
/* If/else/endif. Works by manipulating the execution flags on each
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 60ea44f7a9..2a147fb8c3 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -865,9 +865,9 @@ void brw_math_16( struct brw_compile *p,
*/
void brw_dp_WRITE_16( struct brw_compile *p,
struct brw_reg src,
- GLuint msg_reg_nr,
GLuint scratch_offset )
{
+ GLuint msg_reg_nr = 1;
{
brw_push_insn_state(p);
brw_set_mask_control(p, BRW_MASK_DISABLE);
@@ -877,7 +877,7 @@ void brw_dp_WRITE_16( struct brw_compile *p,
brw_MOV(p,
retype(brw_vec1_grf(0, 2), BRW_REGISTER_TYPE_D),
brw_imm_d(scratch_offset));
-
+
brw_pop_insn_state(p);
}
@@ -912,9 +912,9 @@ void brw_dp_WRITE_16( struct brw_compile *p,
*/
void brw_dp_READ_16( struct brw_compile *p,
struct brw_reg dest,
- GLuint msg_reg_nr,
GLuint scratch_offset )
{
+ GLuint msg_reg_nr = 1;
{
brw_push_insn_state(p);
brw_set_compression_control(p, BRW_COMPRESSION_NONE);
@@ -924,7 +924,7 @@ void brw_dp_READ_16( struct brw_compile *p,
brw_MOV(p,
retype(brw_vec1_grf(0, 2), BRW_REGISTER_TYPE_D),
brw_imm_d(scratch_offset));
-
+
brw_pop_insn_state(p);
}
@@ -958,21 +958,26 @@ void brw_dp_READ_16( struct brw_compile *p,
*/
void brw_dp_READ_4( struct brw_compile *p,
struct brw_reg dest,
- GLuint msg_reg_nr,
GLboolean relAddr,
GLuint location,
GLuint bind_table_index )
{
+ /* XXX: relAddr not implemented */
+ GLuint msg_reg_nr = 1;
{
+ struct brw_reg b;
brw_push_insn_state(p);
+ brw_set_predicate_control(p, BRW_PREDICATE_NONE);
brw_set_compression_control(p, BRW_COMPRESSION_NONE);
brw_set_mask_control(p, BRW_MASK_DISABLE);
- /* set message header global offset field (reg 0, element 2) */
- /* Note that grf[0] will be copied to mrf[1] implicitly by the SEND instr */
- brw_MOV(p,
- retype(brw_vec1_grf(0, 2), BRW_REGISTER_TYPE_UD),
- brw_imm_d(location));
+ /* Setup MRF[1] with location/offset into const buffer */
+ b = brw_message_reg(msg_reg_nr);
+ b = retype(b, BRW_REGISTER_TYPE_UD);
+ /* XXX I think we're setting all the dwords of MRF[1] to 'location'.
+ * when the docs say only dword[2] should be set. Hmmm. But it works.
+ */
+ brw_MOV(p, b, brw_imm_ud(location));
brw_pop_insn_state(p);
}
@@ -988,7 +993,7 @@ void brw_dp_READ_4( struct brw_compile *p,
dest = retype(vec8(dest), BRW_REGISTER_TYPE_UW);
brw_set_dest(insn, dest);
- brw_set_src0(insn, retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW));
+ brw_set_src0(insn, brw_null_reg());
brw_set_dp_read_message(insn,
bind_table_index,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index 72fc21d2eb..a870e75e52 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -1044,7 +1044,6 @@ static void emit_spill( struct brw_wm_compile *c,
*/
brw_dp_WRITE_16(p,
retype(vec16(brw_vec8_grf(0, 0)), BRW_REGISTER_TYPE_UW),
- 1,
slot);
}
@@ -1072,7 +1071,6 @@ static void emit_unspill( struct brw_wm_compile *c,
brw_dp_READ_16(p,
retype(vec16(reg), BRW_REGISTER_TYPE_UW),
- 1,
slot);
}
diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
index c06c820b4d..a907e1b788 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
@@ -304,7 +304,6 @@ static void fetch_constants(struct brw_wm_compile *c,
/* need to fetch the constant now */
brw_dp_READ_4(p,
c->current_const[i].reg, /* writeback dest */
- 1, /* msg_reg */
src->RelAddr, /* relative indexing? */
16 * src->Index, /* byte offset */
SURF_INDEX_FRAG_CONST_BUFFER/* binding table index */