nv30, nv40: non-trivially unify nv[34]0_screen.c

The files have the same structure but are substantially different.

They are unified with appropriate conditionals.

7 files changed, 181 insertions, 434 deletions

diff --git a/src/gallium/drivers/nouveau/nouveau_winsys.h b/src/gallium/drivers/nouveau/nouveau_winsys.h
index af9ddd558c..bed014b9ce 100644
--- a/src/gallium/drivers/nouveau/nouveau_winsys.h
+++ b/src/gallium/drivers/nouveau/nouveau_winsys.h
@@ -27,10 +27,7 @@
 #define NOUVEAU_BUFFER_USAGE_NO_RENDER (1 << 19)
 
 extern struct pipe_screen *
-nv30_screen_create(struct pipe_winsys *ws, struct nouveau_device *);
-
-extern struct pipe_screen *
-nv40_screen_create(struct pipe_winsys *ws, struct nouveau_device *);
+nvfx_screen_create(struct pipe_winsys *ws, struct nouveau_device *);
 
 extern struct pipe_screen *
 nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *);
diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile
index b71afbbb9a..ef3ce7eafa 100644
--- a/src/gallium/drivers/nv30/Makefile
+++ b/src/gallium/drivers/nv30/Makefile
@@ -6,7 +6,6 @@ LIBNAME = nv30
 C_SOURCES = \
 	nv30_context.c \
 	nv30_fragtex.c \
-	nv30_screen.c \
 	nv30_state.c
 
 LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/nvfx
diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile
index c8f3858c36..a37446d50c 100644
--- a/src/gallium/drivers/nv40/Makefile
+++ b/src/gallium/drivers/nv40/Makefile
@@ -6,7 +6,6 @@ LIBNAME = nv40
 C_SOURCES = \
 	nv40_context.c \
 	nv40_fragtex.c \
-	nv40_screen.c \
 	nv40_state.c
 
 LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/nvfx
diff --git a/src/gallium/drivers/nv40/nv40_screen.c b/src/gallium/drivers/nv40/nv40_screen.c
deleted file mode 100644
index 0603b7d1c1..0000000000
--- a/src/gallium/drivers/nv40/nv40_screen.c
+++ /dev/null
@@ -1,322 +0,0 @@
-#include "pipe/p_screen.h"
-
-#include "nv40_context.h"
-#include "nvfx_screen.h"
-
-#define NV4X_GRCLASS4097_CHIPSETS 0x00000baf
-#define NV4X_GRCLASS4497_CHIPSETS 0x00005450
-#define NV6X_GRCLASS4497_CHIPSETS 0x00000088
-
-static int
-nv40_screen_get_param(struct pipe_screen *pscreen, int param)
-{
-	struct nvfx_screen *screen = nvfx_screen(pscreen);
-
-	switch (param) {
-	case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
-		return 16;
-	case PIPE_CAP_NPOT_TEXTURES:
-		return 1;
-	case PIPE_CAP_TWO_SIDED_STENCIL:
-		return 1;
-	case PIPE_CAP_GLSL:
-		return 0;
-	case PIPE_CAP_ANISOTROPIC_FILTER:
-		return 1;
-	case PIPE_CAP_POINT_SPRITE:
-		return 1;
-	case PIPE_CAP_MAX_RENDER_TARGETS:
-		return 4;
-	case PIPE_CAP_OCCLUSION_QUERY:
-		return 1;
-	case PIPE_CAP_TEXTURE_SHADOW_MAP:
-		return 1;
-	case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
-		return 13;
-	case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
-		return 10;
-	case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
-		return 13;
-	case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
-	case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
-		return 1;
-	case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
-		return 0; /* We have 4 - but unsupported currently */
-	case PIPE_CAP_TGSI_CONT_SUPPORTED:
-		return 0;
-	case PIPE_CAP_BLEND_EQUATION_SEPARATE:
-		return 1;
-	case NOUVEAU_CAP_HW_VTXBUF:
-		return 1;
-	case NOUVEAU_CAP_HW_IDXBUF:
-		if (screen->eng3d->grclass == NV40TCL)
-			return 1;
-		return 0;
-	case PIPE_CAP_INDEP_BLEND_ENABLE:
-		return 0;
-	case PIPE_CAP_INDEP_BLEND_FUNC:
-		return 0;
-	case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
-	case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
-		return 1;
-	case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
-	case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
-		return 0;
-	case PIPE_CAP_MAX_COMBINED_SAMPLERS:
-		return 16;
-	default:
-		NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
-		return 0;
-	}
-}
-
-static float
-nv40_screen_get_paramf(struct pipe_screen *pscreen, int param)
-{
-	switch (param) {
-	case PIPE_CAP_MAX_LINE_WIDTH:
-	case PIPE_CAP_MAX_LINE_WIDTH_AA:
-		return 10.0;
-	case PIPE_CAP_MAX_POINT_WIDTH:
-	case PIPE_CAP_MAX_POINT_WIDTH_AA:
-		return 64.0;
-	case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
-		return 16.0;
-	case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
-		return 16.0;
-	default:
-		NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
-		return 0.0;
-	}
-}
-
-static boolean
-nv40_screen_surface_format_supported(struct pipe_screen *pscreen,
-				     enum pipe_format format,
-				     enum pipe_texture_target target,
-				     unsigned tex_usage, unsigned geom_flags)
-{
-	if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) {
-		switch (format) {
-		case PIPE_FORMAT_B8G8R8A8_UNORM:
-		case PIPE_FORMAT_B5G6R5_UNORM: 
-			return TRUE;
-		default:
-			break;
-		}
-	} else
-	if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) {
-		switch (format) {
-		case PIPE_FORMAT_S8Z24_UNORM:
-		case PIPE_FORMAT_X8Z24_UNORM:
-		case PIPE_FORMAT_Z16_UNORM:
-			return TRUE;
-		default:
-			break;
-		}
-	} else {
-		switch (format) {
-		case PIPE_FORMAT_B8G8R8A8_UNORM:
-		case PIPE_FORMAT_B5G5R5A1_UNORM:
-		case PIPE_FORMAT_B4G4R4A4_UNORM:
-		case PIPE_FORMAT_B5G6R5_UNORM:
-		case PIPE_FORMAT_R16_SNORM:
-		case PIPE_FORMAT_L8_UNORM:
-		case PIPE_FORMAT_A8_UNORM:
-		case PIPE_FORMAT_I8_UNORM:
-		case PIPE_FORMAT_L8A8_UNORM:
-		case PIPE_FORMAT_Z16_UNORM:
-		case PIPE_FORMAT_S8Z24_UNORM:
-		case PIPE_FORMAT_DXT1_RGB:
-		case PIPE_FORMAT_DXT1_RGBA:
-		case PIPE_FORMAT_DXT3_RGBA:
-		case PIPE_FORMAT_DXT5_RGBA:
-			return TRUE;
-		default:
-			break;
-		}
-	}
-
-	return FALSE;
-}
-
-static struct pipe_buffer *
-nv40_surface_buffer(struct pipe_surface *surf)
-{
-	struct nvfx_miptree *mt = (struct nvfx_miptree *)surf->texture;
-
-	return mt->buffer;
-}
-
-static void
-nv40_screen_destroy(struct pipe_screen *pscreen)
-{
-	struct nvfx_screen *screen = nvfx_screen(pscreen);
-	unsigned i;
-
-	for (i = 0; i < NVFX_STATE_MAX; i++) {
-		if (screen->state[i])
-			so_ref(NULL, &screen->state[i]);
-	}
-
-	nouveau_resource_destroy(&screen->vp_exec_heap);
-	nouveau_resource_destroy(&screen->vp_data_heap);
-	nouveau_resource_destroy(&screen->query_heap);
-	nouveau_notifier_free(&screen->query);
-	nouveau_notifier_free(&screen->sync);
-	nouveau_grobj_free(&screen->eng3d);
-	nv04_surface_2d_takedown(&screen->eng2d);
-
-	nouveau_screen_fini(&screen->base);
-
-	FREE(pscreen);
-}
-
-struct pipe_screen *
-nv40_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
-{
-	struct nvfx_screen *screen = CALLOC_STRUCT(nvfx_screen);
-	struct nouveau_channel *chan;
-	struct pipe_screen *pscreen;
-	struct nouveau_stateobj *so;
-	unsigned eng3d_class = 0;
-	int ret;
-
-	if (!screen)
-		return NULL;
-
-	screen->is_nv4x = ~0;
-
-	pscreen = &screen->base.base;
-
-	ret = nouveau_screen_init(&screen->base, dev);
-	if (ret) {
-		nv40_screen_destroy(pscreen);
-		return NULL;
-	}
-	chan = screen->base.channel;
-
-	pscreen->winsys = ws;
-	pscreen->destroy = nv40_screen_destroy;
-	pscreen->get_param = nv40_screen_get_param;
-	pscreen->get_paramf = nv40_screen_get_paramf;
-	pscreen->is_format_supported = nv40_screen_surface_format_supported;
-	pscreen->context_create = nv40_create;
-
-	nvfx_screen_init_miptree_functions(pscreen);
-
-	/* 3D object */
-	switch (dev->chipset & 0xf0) {
-	case 0x40:
-		if (NV4X_GRCLASS4097_CHIPSETS & (1 << (dev->chipset & 0x0f)))
-			eng3d_class = NV40TCL;
-		else
-		if (NV4X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f)))
-			eng3d_class = NV44TCL;
-		break;
-	case 0x60:
-		if (NV6X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f)))
-			eng3d_class = NV44TCL;
-		break;
-	}
-
-	if (!eng3d_class) {
-		NOUVEAU_ERR("Unknown nv4x chipset: nv%02x\n", dev->chipset);
-		return NULL;
-	}
-
-	ret = nouveau_grobj_alloc(chan, 0xbeef3097, eng3d_class, &screen->eng3d);
-	if (ret) {
-		NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
-		return FALSE;
-	}
-
-	/* 2D engine setup */
-	screen->eng2d = nv04_surface_2d_init(&screen->base);
-	screen->eng2d->buf = nv40_surface_buffer;
-
-	/* Notifier for sync purposes */
-	ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync);
-	if (ret) {
-		NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
-		nv40_screen_destroy(pscreen);
-		return NULL;
-	}
-
-	/* Query objects */
-	ret = nouveau_notifier_alloc(chan, 0xbeef0302, 32, &screen->query);
-	if (ret) {
-		NOUVEAU_ERR("Error initialising query objects: %d\n", ret);
-		nv40_screen_destroy(pscreen);
-		return NULL;
-	}
-
-	nouveau_resource_init(&screen->query_heap, 0, 32);
-	if (ret) {
-		NOUVEAU_ERR("Error initialising query object heap: %d\n", ret);
-		nv40_screen_destroy(pscreen);
-		return NULL;
-	}
-
-	/* Vtxprog resources */
-	if (nouveau_resource_init(&screen->vp_exec_heap, 0, 512) ||
-	    nouveau_resource_init(&screen->vp_data_heap, 0, 256)) {
-		nv40_screen_destroy(pscreen);
-		return NULL;
-	}
-
-	/* Static eng3d initialisation */
-	so = so_new(16, 25, 0);
-	so_method(so, screen->eng3d, NV34TCL_DMA_NOTIFY, 1);
-	so_data  (so, screen->sync->handle);
-	so_method(so, screen->eng3d, NV34TCL_DMA_TEXTURE0, 2);
-	so_data  (so, chan->vram->handle);
-	so_data  (so, chan->gart->handle);
-	so_method(so, screen->eng3d, NV34TCL_DMA_COLOR1, 1);
-	so_data  (so, chan->vram->handle);
-	so_method(so, screen->eng3d, NV34TCL_DMA_COLOR0, 2);
-	so_data  (so, chan->vram->handle);
-	so_data  (so, chan->vram->handle);
-	so_method(so, screen->eng3d, NV34TCL_DMA_VTXBUF0, 2);
-	so_data  (so, chan->vram->handle);
-	so_data  (so, chan->gart->handle);
-	so_method(so, screen->eng3d, NV34TCL_DMA_FENCE, 2);
-	so_data  (so, 0);
-	so_data  (so, screen->query->handle);
-	so_method(so, screen->eng3d, NV34TCL_DMA_IN_MEMORY7, 2);
-	so_data  (so, chan->vram->handle);
-	so_data  (so, chan->vram->handle);
-	so_method(so, screen->eng3d, NV40TCL_DMA_COLOR2, 2);
-	so_data  (so, chan->vram->handle);
-	so_data  (so, chan->vram->handle);
-
-	so_method(so, screen->eng3d, 0x1ea4, 3);
-	so_data  (so, 0x00000010);
-	so_data  (so, 0x01000100);
-	so_data  (so, 0xff800006);
-
-	/* vtxprog output routing */
-	so_method(so, screen->eng3d, 0x1fc4, 1);
-	so_data  (so, 0x06144321);
-	so_method(so, screen->eng3d, 0x1fc8, 2);
-	so_data  (so, 0xedcba987);
-	so_data  (so, 0x00000021);
-	so_method(so, screen->eng3d, 0x1fd0, 1);
-	so_data  (so, 0x00171615);
-	so_method(so, screen->eng3d, 0x1fd4, 1);
-	so_data  (so, 0x001b1a19);
-
-	so_method(so, screen->eng3d, 0x1ef8, 1);
-	so_data  (so, 0x0020ffff);
-	so_method(so, screen->eng3d, 0x1d64, 1);
-	so_data  (so, 0x00d30000);
-	so_method(so, screen->eng3d, 0x1e94, 1);
-	so_data  (so, 0x00000001);
-
-	so_emit(chan, so);
-	so_ref(NULL, &so);
-	nouveau_pushbuf_flush(chan, 0);
-
-	return pscreen;
-}
-
diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile
index a665c7e263..e2c24ebc3c 100644
--- a/src/gallium/drivers/nvfx/Makefile
+++ b/src/gallium/drivers/nvfx/Makefile
@@ -9,6 +9,7 @@ C_SOURCES = \
 	nvfx_fragprog.c \
 	nvfx_miptree.c \
 	nvfx_query.c \
+	nvfx_screen.c \
 	nvfx_state.c \
 	nvfx_state_blend.c \
         nvfx_state_emit.c \
diff --git a/src/gallium/drivers/nv30/nv30_screen.c b/src/gallium/drivers/nvfx/nvfx_screen.c
index 3a48255c18..6132cf94e2 100644
--- a/src/gallium/drivers/nv30/nv30_screen.c
+++ b/src/gallium/drivers/nvfx/nvfx_screen.c
@@ -3,7 +3,8 @@
 
 #include "nouveau/nouveau_screen.h"
 
-#include "nv30_context.h"
+#include "nv30/nv30_context.h"
+#include "nv40/nv40_context.h"
 #include "nvfx_screen.h"
 
 #define NV30TCL_CHIPSET_3X_MASK 0x00000003
@@ -11,10 +12,10 @@
 #define NV35TCL_CHIPSET_3X_MASK 0x000001e0
 
 /* FIXME: It seems I should not include directly ../../winsys/drm/nouveau/drm/nouveau_drm_api.h
- * to get the pointer to the context front buffer, so I copied nouveau_winsys here.
- * nv30_screen_surface_format_supported() can then use it to enforce creating fbo
- * with same number of bits everywhere.
- */
+* to get the pointer to the context front buffer, so I copied nouveau_winsys here.
+* nv30_screen_surface_format_supported() can then use it to enforce creating fbo
+* with same number of bits everywhere.
+*/
 struct nouveau_winsys {
 	struct pipe_winsys base;
 
@@ -22,15 +23,21 @@ struct nouveau_winsys {
 
 	struct pipe_surface *front;
 };
+#define NV4X_GRCLASS4097_CHIPSETS 0x00000baf
+#define NV4X_GRCLASS4497_CHIPSETS 0x00005450
+#define NV6X_GRCLASS4497_CHIPSETS 0x00000088
 
 static int
-nv30_screen_get_param(struct pipe_screen *pscreen, int param)
+nvfx_screen_get_param(struct pipe_screen *pscreen, int param)
 {
+	struct nvfx_screen *screen = nvfx_screen(pscreen);
+
 	switch (param) {
 	case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
-		return 8;
+		/* TODO: check this */
+		return screen->is_nv4x ? 16 : 8;
 	case PIPE_CAP_NPOT_TEXTURES:
-		return 0;
+		return !!screen->is_nv4x;
 	case PIPE_CAP_TWO_SIDED_STENCIL:
 		return 1;
 	case PIPE_CAP_GLSL:
@@ -40,7 +47,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, int param)
 	case PIPE_CAP_POINT_SPRITE:
 		return 1;
 	case PIPE_CAP_MAX_RENDER_TARGETS:
-		return 2;
+		return screen->is_nv4x ? 4 : 2;
 	case PIPE_CAP_OCCLUSION_QUERY:
 		return 1;
 	case PIPE_CAP_TEXTURE_SHADOW_MAP:
@@ -52,21 +59,26 @@ nv30_screen_get_param(struct pipe_screen *pscreen, int param)
 	case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 		return 13;
 	case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
-		return 0;
+		return !!screen->is_nv4x;
 	case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 		return 1;
 	case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
-		return 0;
+		return 0; /* We have 4 on nv40 - but unsupported currently */
 	case PIPE_CAP_TGSI_CONT_SUPPORTED:
 		return 0;
 	case PIPE_CAP_BLEND_EQUATION_SEPARATE:
-		return 0;
+		return !!screen->is_nv4x;
 	case NOUVEAU_CAP_HW_VTXBUF:
+		/* TODO: this is almost surely wrong */
+		return !!screen->is_nv4x;
 	case NOUVEAU_CAP_HW_IDXBUF:
-		return 1;
+		/* TODO: this is also almost surely wrong */
+		return screen->is_nv4x && screen->eng3d->grclass == NV40TCL;
 	case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 		return 16;
 	case PIPE_CAP_INDEP_BLEND_ENABLE:
+		/* TODO: on nv40 we have separate color masks */
+		/* TODO: nv40 mrt blending is probably broken */
 		return 0;
 	case PIPE_CAP_INDEP_BLEND_FUNC:
 		return 0;
@@ -83,8 +95,10 @@ nv30_screen_get_param(struct pipe_screen *pscreen, int param)
 }
 
 static float
-nv30_screen_get_paramf(struct pipe_screen *pscreen, int param)
+nvfx_screen_get_paramf(struct pipe_screen *pscreen, int param)
 {
+	struct nvfx_screen *screen = nvfx_screen(pscreen);
+
 	switch (param) {
 	case PIPE_CAP_MAX_LINE_WIDTH:
 	case PIPE_CAP_MAX_LINE_WIDTH_AA:
@@ -93,9 +107,9 @@ nv30_screen_get_paramf(struct pipe_screen *pscreen, int param)
 	case PIPE_CAP_MAX_POINT_WIDTH_AA:
 		return 64.0;
 	case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
-		return 8.0;
+		return screen->is_nv4x ? 16.0 : 8.0;
 	case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
-		return 4.0;
+		return screen->is_nv4x ? 16.0 : 4.0;
 	default:
 		NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
 		return 0.0;
@@ -103,11 +117,12 @@ nv30_screen_get_paramf(struct pipe_screen *pscreen, int param)
 }
 
 static boolean
-nv30_screen_surface_format_supported(struct pipe_screen *pscreen,
+nvfx_screen_surface_format_supported(struct pipe_screen *pscreen,
 				     enum pipe_format format,
 				     enum pipe_texture_target target,
 				     unsigned tex_usage, unsigned geom_flags)
 {
+	struct nvfx_screen *screen = nvfx_screen(pscreen);
 	struct pipe_surface *front = ((struct nouveau_winsys *) pscreen->winsys)->front;
 
 	if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) {
@@ -125,9 +140,9 @@ nv30_screen_surface_format_supported(struct pipe_screen *pscreen,
 		case PIPE_FORMAT_X8Z24_UNORM:
 			return TRUE;
 		case PIPE_FORMAT_Z16_UNORM:
-			if (front) {
+			/* TODO: this nv30 limitation probably does not exist */
+			if (!screen->is_nv4x && front)
 				return (front->format == PIPE_FORMAT_B5G6R5_UNORM);
-			}
 			return TRUE;
 		default:
 			break;
@@ -144,7 +159,14 @@ nv30_screen_surface_format_supported(struct pipe_screen *pscreen,
 		case PIPE_FORMAT_L8A8_UNORM:
 		case PIPE_FORMAT_Z16_UNORM:
 		case PIPE_FORMAT_S8Z24_UNORM:
+		case PIPE_FORMAT_DXT1_RGB:
+		case PIPE_FORMAT_DXT1_RGBA:
+		case PIPE_FORMAT_DXT3_RGBA:
+		case PIPE_FORMAT_DXT5_RGBA:
 			return TRUE;
+		/* TODO: does nv30 support this? */
+		case PIPE_FORMAT_R16_SNORM:
+			return !!screen->is_nv4x;
 		default:
 			break;
 		}
@@ -154,7 +176,7 @@ nv30_screen_surface_format_supported(struct pipe_screen *pscreen,
 }
 
 static struct pipe_buffer *
-nv30_surface_buffer(struct pipe_surface *surf)
+nvfx_surface_buffer(struct pipe_surface *surf)
 {
 	struct nvfx_miptree *mt = (struct nvfx_miptree *)surf->texture;
 
@@ -162,7 +184,7 @@ nv30_surface_buffer(struct pipe_surface *surf)
 }
 
 static void
-nv30_screen_destroy(struct pipe_screen *pscreen)
+nvfx_screen_destroy(struct pipe_screen *pscreen)
 {
 	struct nvfx_screen *screen = nvfx_screen(pscreen);
 	unsigned i;
@@ -185,59 +207,157 @@ nv30_screen_destroy(struct pipe_screen *pscreen)
 	FREE(pscreen);
 }
 
+static void nv30_screen_init(struct nvfx_screen *screen, struct nouveau_stateobj* so)
+{
+	screen->base.base.context_create = nv30_create;
+	int i;
+
+	/* TODO: perhaps we should do some of this on nv40 too? */
+	for (i=1; i<8; i++) {
+		so_method(so, screen->eng3d, NV34TCL_VIEWPORT_CLIP_HORIZ(i), 1);
+		so_data  (so, 0);
+		so_method(so, screen->eng3d, NV34TCL_VIEWPORT_CLIP_VERT(i), 1);
+		so_data  (so, 0);
+	}
+
+	so_method(so, screen->eng3d, 0x220, 1);
+	so_data  (so, 1);
+
+	so_method(so, screen->eng3d, 0x03b0, 1);
+	so_data  (so, 0x00100000);
+	so_method(so, screen->eng3d, 0x1454, 1);
+	so_data  (so, 0);
+	so_method(so, screen->eng3d, 0x1d80, 1);
+	so_data  (so, 3);
+	so_method(so, screen->eng3d, 0x1450, 1);
+	so_data  (so, 0x00030004);
+
+	/* NEW */
+	so_method(so, screen->eng3d, 0x1e98, 1);
+	so_data  (so, 0);
+	so_method(so, screen->eng3d, 0x17e0, 3);
+	so_data  (so, fui(0.0));
+	so_data  (so, fui(0.0));
+	so_data  (so, fui(1.0));
+	so_method(so, screen->eng3d, 0x1f80, 16);
+	for (i=0; i<16; i++) {
+		so_data  (so, (i==8) ? 0x0000ffff : 0);
+	}
+
+	so_method(so, screen->eng3d, 0x120, 3);
+	so_data  (so, 0);
+	so_data  (so, 1);
+	so_data  (so, 2);
+
+	so_method(so, screen->eng3d, 0x1d88, 1);
+	so_data  (so, 0x00001200);
+
+	so_method(so, screen->eng3d, NV34TCL_RC_ENABLE, 1);
+	so_data  (so, 0);
+
+	so_method(so, screen->eng3d, NV34TCL_DEPTH_RANGE_NEAR, 2);
+	so_data  (so, fui(0.0));
+	so_data  (so, fui(1.0));
+
+	so_method(so, screen->eng3d, NV34TCL_MULTISAMPLE_CONTROL, 1);
+	so_data  (so, 0xffff0000);
+
+	/* enables use of vp rather than fixed-function somehow */
+	so_method(so, screen->eng3d, 0x1e94, 1);
+	so_data  (so, 0x13);
+}
+
+static void nv40_screen_init(struct nvfx_screen *screen, struct nouveau_stateobj* so)
+{
+	screen->base.base.context_create = nv40_create;
+
+	so_method(so, screen->eng3d, NV40TCL_DMA_COLOR2, 2);
+	so_data  (so, screen->base.channel->vram->handle);
+	so_data  (so, screen->base.channel->vram->handle);
+
+	so_method(so, screen->eng3d, 0x1ea4, 3);
+	so_data  (so, 0x00000010);
+	so_data  (so, 0x01000100);
+	so_data  (so, 0xff800006);
+
+	/* vtxprog output routing */
+	so_method(so, screen->eng3d, 0x1fc4, 1);
+	so_data  (so, 0x06144321);
+	so_method(so, screen->eng3d, 0x1fc8, 2);
+	so_data  (so, 0xedcba987);
+	so_data  (so, 0x00000021);
+	so_method(so, screen->eng3d, 0x1fd0, 1);
+	so_data  (so, 0x00171615);
+	so_method(so, screen->eng3d, 0x1fd4, 1);
+	so_data  (so, 0x001b1a19);
+
+	so_method(so, screen->eng3d, 0x1ef8, 1);
+	so_data  (so, 0x0020ffff);
+	so_method(so, screen->eng3d, 0x1d64, 1);
+	so_data  (so, 0x00d30000);
+	so_method(so, screen->eng3d, 0x1e94, 1);
+	so_data  (so, 0x00000001);
+}
+
 struct pipe_screen *
-nv30_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
+nvfx_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 {
 	struct nvfx_screen *screen = CALLOC_STRUCT(nvfx_screen);
 	struct nouveau_channel *chan;
 	struct pipe_screen *pscreen;
 	struct nouveau_stateobj *so;
 	unsigned eng3d_class = 0;
-	int ret, i;
+	int ret;
 
 	if (!screen)
 		return NULL;
+
 	pscreen = &screen->base.base;
 
 	ret = nouveau_screen_init(&screen->base, dev);
 	if (ret) {
-		nv30_screen_destroy(pscreen);
+		nvfx_screen_destroy(pscreen);
 		return NULL;
 	}
 	chan = screen->base.channel;
 
 	pscreen->winsys = ws;
-	pscreen->destroy = nv30_screen_destroy;
-	pscreen->get_param = nv30_screen_get_param;
-	pscreen->get_paramf = nv30_screen_get_paramf;
-	pscreen->is_format_supported = nv30_screen_surface_format_supported;
-	pscreen->context_create = nv30_create;
+	pscreen->destroy = nvfx_screen_destroy;
+	pscreen->get_param = nvfx_screen_get_param;
+	pscreen->get_paramf = nvfx_screen_get_paramf;
+	pscreen->is_format_supported = nvfx_screen_surface_format_supported;
 
-	nvfx_screen_init_miptree_functions(pscreen);
-
-	/* 3D object */
 	switch (dev->chipset & 0xf0) {
 	case 0x30:
 		if (NV30TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f)))
 			eng3d_class = 0x0397;
-		else
-		if (NV34TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f)))
+		else if (NV34TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f)))
 			eng3d_class = 0x0697;
-		else
-		if (NV35TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f)))
+		else if (NV35TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f)))
 			eng3d_class = 0x0497;
 		break;
-	default:
+	case 0x40:
+		if (NV4X_GRCLASS4097_CHIPSETS & (1 << (dev->chipset & 0x0f)))
+			eng3d_class = NV40TCL;
+		else if (NV4X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f)))
+			eng3d_class = NV44TCL;
+		screen->is_nv4x = ~0;
+		break;
+	case 0x60:
+		if (NV6X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f)))
+			eng3d_class = NV44TCL;
+		screen->is_nv4x = ~0;
 		break;
 	}
 
 	if (!eng3d_class) {
-		NOUVEAU_ERR("Unknown nv3x chipset: nv%02x\n", dev->chipset);
+		NOUVEAU_ERR("Unknown nv3x/nv4x chipset: nv%02x\n", dev->chipset);
 		return NULL;
 	}
 
-	ret = nouveau_grobj_alloc(chan, 0xbeef3097, eng3d_class,
-				  &screen->eng3d);
+	nvfx_screen_init_miptree_functions(pscreen);
+
+	ret = nouveau_grobj_alloc(chan, 0xbeef3097, eng3d_class, &screen->eng3d);
 	if (ret) {
 		NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
 		return FALSE;
@@ -245,13 +365,13 @@ nv30_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 
 	/* 2D engine setup */
 	screen->eng2d = nv04_surface_2d_init(&screen->base);
-	screen->eng2d->buf = nv30_surface_buffer;
+	screen->eng2d->buf = nvfx_surface_buffer;
 
 	/* Notifier for sync purposes */
 	ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync);
 	if (ret) {
 		NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
-		nv30_screen_destroy(pscreen);
+		nvfx_screen_destroy(pscreen);
 		return NULL;
 	}
 
@@ -259,26 +379,28 @@ nv30_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 	ret = nouveau_notifier_alloc(chan, 0xbeef0302, 32, &screen->query);
 	if (ret) {
 		NOUVEAU_ERR("Error initialising query objects: %d\n", ret);
-		nv30_screen_destroy(pscreen);
+		nvfx_screen_destroy(pscreen);
 		return NULL;
 	}
 
 	ret = nouveau_resource_init(&screen->query_heap, 0, 32);
 	if (ret) {
 		NOUVEAU_ERR("Error initialising query object heap: %d\n", ret);
-		nv30_screen_destroy(pscreen);
+		nvfx_screen_destroy(pscreen);
 		return NULL;
 	}
 
 	/* Vtxprog resources */
-	if (nouveau_resource_init(&screen->vp_exec_heap, 0, 256) ||
+	if (nouveau_resource_init(&screen->vp_exec_heap, 0, screen->is_nv4x ? 512 : 256) ||
 	    nouveau_resource_init(&screen->vp_data_heap, 0, 256)) {
-		nv30_screen_destroy(pscreen);
+		nvfx_screen_destroy(pscreen);
 		return NULL;
 	}
 
 	/* Static eng3d initialisation */
-	so = so_new(36, 60, 0);
+	/* make the so big and don't worry about exact values
+	   since we it will be thrown away immediately after use */
+	so = so_new(256, 256, 0);
 	so_method(so, screen->eng3d, NV34TCL_DMA_NOTIFY, 1);
 	so_data  (so, screen->sync->handle);
 	so_method(so, screen->eng3d, NV34TCL_DMA_TEXTURE0, 2);
@@ -292,66 +414,19 @@ nv30_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 	so_method(so, screen->eng3d, NV34TCL_DMA_VTXBUF0, 2);
 	so_data  (so, chan->vram->handle);
 	so_data  (so, chan->gart->handle);
-/*	so_method(so, screen->eng3d, NV34TCL_DMA_FENCE, 2);
-	so_data  (so, 0);
-	so_data  (so, screen->query->handle);*/
-	so_method(so, screen->eng3d, NV34TCL_DMA_IN_MEMORY7, 1);
-	so_data  (so, chan->vram->handle);
-	so_method(so, screen->eng3d, NV34TCL_DMA_IN_MEMORY8, 1);
-	so_data  (so, chan->vram->handle);
 
-	for (i=1; i<8; i++) {
-		so_method(so, screen->eng3d, NV34TCL_VIEWPORT_CLIP_HORIZ(i), 1);
-		so_data  (so, 0);
-		so_method(so, screen->eng3d, NV34TCL_VIEWPORT_CLIP_VERT(i), 1);
-		so_data  (so, 0);
-	}
-
-	so_method(so, screen->eng3d, 0x220, 1);
-	so_data  (so, 1);
-
-	so_method(so, screen->eng3d, 0x03b0, 1);
-	so_data  (so, 0x00100000);
-	so_method(so, screen->eng3d, 0x1454, 1);
+	so_method(so, screen->eng3d, NV34TCL_DMA_FENCE, 2);
 	so_data  (so, 0);
-	so_method(so, screen->eng3d, 0x1d80, 1);
-	so_data  (so, 3);
-	so_method(so, screen->eng3d, 0x1450, 1);
-	so_data  (so, 0x00030004);
+	so_data  (so, screen->query->handle);
 
-	/* NEW */
-	so_method(so, screen->eng3d, 0x1e98, 1);
-	so_data  (so, 0);
-	so_method(so, screen->eng3d, 0x17e0, 3);
-	so_data  (so, fui(0.0));
-	so_data  (so, fui(0.0));
-	so_data  (so, fui(1.0));
-	so_method(so, screen->eng3d, 0x1f80, 16);
-	for (i=0; i<16; i++) {
-		so_data  (so, (i==8) ? 0x0000ffff : 0);
-	}
-
-	so_method(so, screen->eng3d, 0x120, 3);
-	so_data  (so, 0);
-	so_data  (so, 1);
-	so_data  (so, 2);
-
-	so_method(so, screen->eng3d, 0x1d88, 1);
-	so_data  (so, 0x00001200);
-
-	so_method(so, screen->eng3d, NV34TCL_RC_ENABLE, 1);
-	so_data  (so, 0);
-
-	so_method(so, screen->eng3d, NV34TCL_DEPTH_RANGE_NEAR, 2);
-	so_data  (so, fui(0.0));
-	so_data  (so, fui(1.0));
-
-	so_method(so, screen->eng3d, NV34TCL_MULTISAMPLE_CONTROL, 1);
-	so_data  (so, 0xffff0000);
+	so_method(so, screen->eng3d, NV34TCL_DMA_IN_MEMORY7, 2);
+	so_data  (so, chan->vram->handle);
+	so_data  (so, chan->vram->handle);
 
-	/* enables use of vp rather than fixed-function somehow */
-	so_method(so, screen->eng3d, 0x1e94, 1);
-	so_data  (so, 0x13);
+	if(!screen->is_nv4x)
+		nv30_screen_init(screen, so);
+	else
+		nv40_screen_init(screen, so);
 
 	so_emit(chan, so);
 	so_ref(NULL, &so);
diff --git a/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c b/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c
index 21517b4bb5..716d4bacd3 100644
--- a/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c
+++ b/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c
@@ -86,11 +86,9 @@ nouveau_drm_create_screen(struct drm_api *api, int fd,
 
 	switch (dev->chipset & 0xf0) {
 	case 0x30:
-		init = nv30_screen_create;
-		break;
 	case 0x40:
 	case 0x60:
-		init = nv40_screen_create;
+		init = nvfx_screen_create;
 		break;
 	case 0x50:
 	case 0x80: