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authorHenri Verbeet <hverbeet@gmail.com>2011-01-25 00:27:50 +0100
committerHenri Verbeet <hverbeet@gmail.com>2011-01-25 00:35:34 +0100
commit1af59b28b57f460b2944f803251a297fd4f7a769 (patch)
tree3ad73f5e5b77bc7ab387f2d0580b2460c05c16d8
parent3d9138781ddafb54105db125e270eefc8444992a (diff)
r600g: FLT_TO_INT* are vector instructions on Evergreen.
FLT_TO_INT is a vector instruction, despite what the (current) documentation says. FLT_TO_INT_FLOOR and FLT_TO_INT_RPI aren't explicitly mentioned in the documentation, but those are vector instructions too.
-rw-r--r--src/gallium/drivers/r600/r600_asm.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c
index f46059b9e9..9cdd10f987 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -417,9 +417,9 @@ static int is_alu_trans_unit_inst(struct r600_bc *bc, struct r600_bc_alu *alu)
case CHIPREV_EVERGREEN:
default:
if (!alu->is_op3)
+ /* Note that FLT_TO_INT* instructions are vector instructions
+ * on Evergreen, despite what the documentation says. */
return alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR ||
alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT ||
alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT ||
alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT ||