summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorBrian Paul <brianp@vmware.com>2009-03-31 10:53:56 -0600
committerBrian Paul <brianp@vmware.com>2009-04-03 09:07:03 -0600
commit5f1ce6b87e837b9f6bc2a4f3e81cf8feea4af2df (patch)
tree6802975fb49229b7200d350d1315dedb5b7475f8
parented8f54aa65eed2cdef79ddc110dad217d3955ec7 (diff)
i965: comments
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 7909fd65a9..90d74c2885 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -105,12 +105,17 @@ brw_wm_non_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
brw_wm_pass1(c);
/* Register allocation.
+ * Divide by two because we operate on 16 pixels at a time and require
+ * two GRF entries for each logical shader register.
*/
c->grf_limit = BRW_WM_MAX_GRF / 2;
brw_wm_pass2(c);
+ /* how many general-purpose registers are used */
c->prog_data.total_grf = c->max_wm_grf;
+
+ /* Scratch space is used for register spilling */
if (c->last_scratch) {
c->prog_data.total_scratch = c->last_scratch + 0x40;
}