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authorBrian Paul <brian.paul@tungstengraphics.com>2008-09-05 10:18:00 -0600
committerBrian Paul <brian.paul@tungstengraphics.com>2008-09-05 10:18:00 -0600
commit8af4794afcfa04351d4131d826daeb1312634f82 (patch)
tree36b078411eaf373fbc7ce3b30659767ff4d20229
parenta267934b23aca1c39d228c23392862f8068c2968 (diff)
cell: code clean-up, comments
-rw-r--r--src/gallium/drivers/cell/spu/spu_main.c67
-rw-r--r--src/gallium/drivers/cell/spu/spu_main.h8
2 files changed, 43 insertions, 32 deletions
diff --git a/src/gallium/drivers/cell/spu/spu_main.c b/src/gallium/drivers/cell/spu/spu_main.c
index 0d4cdfae85..d223f32d94 100644
--- a/src/gallium/drivers/cell/spu/spu_main.c
+++ b/src/gallium/drivers/cell/spu/spu_main.c
@@ -55,6 +55,10 @@ struct spu_global spu;
struct spu_vs_context draw;
+
+/**
+ * Buffers containing dynamically generated SPU code:
+ */
static unsigned char attribute_fetch_code_buffer[136 * PIPE_MAX_ATTRIBS]
ALIGN16_ATTRIB;
@@ -333,6 +337,21 @@ cmd_state_depth_stencil(const struct cell_command_depth_stencil_alpha_test *stat
static void
+cmd_state_logicop(const struct cell_command_logicop * code)
+{
+ mfc_get(logicop_code_buffer,
+ (unsigned int) code->base, /* src */
+ code->size,
+ TAG_BATCH_BUFFER,
+ 0, /* tid */
+ 0 /* rid */);
+ wait_on_mask(1 << TAG_BATCH_BUFFER);
+
+ spu.logicop = (logicop_func) logicop_code_buffer;
+}
+
+
+static void
cmd_state_sampler(const struct cell_command_sampler *sampler)
{
if (Debug)
@@ -402,6 +421,21 @@ cmd_state_vs_array_info(const struct cell_array_info *vs_info)
static void
+cmd_state_attrib_fetch(const struct cell_attribute_fetch_code *code)
+{
+ mfc_get(attribute_fetch_code_buffer,
+ (unsigned int) code->base, /* src */
+ code->size,
+ TAG_BATCH_BUFFER,
+ 0, /* tid */
+ 0 /* rid */);
+ wait_on_mask(1 << TAG_BATCH_BUFFER);
+
+ draw.vertex_fetch.code = attribute_fetch_code_buffer;
+}
+
+
+static void
cmd_finish(void)
{
if (Debug)
@@ -539,38 +573,15 @@ cmd_batch(uint opcode)
(struct cell_shader_info *) &buffer[pos+1]);
pos += (1 + ROUNDUP8(sizeof(struct cell_shader_info)) / 8);
break;
- case CELL_CMD_STATE_ATTRIB_FETCH: {
- struct cell_attribute_fetch_code *code =
- (struct cell_attribute_fetch_code *) &buffer[pos+1];
-
- mfc_get(attribute_fetch_code_buffer,
- (unsigned int) code->base, /* src */
- code->size,
- TAG_BATCH_BUFFER,
- 0, /* tid */
- 0 /* rid */);
- wait_on_mask(1 << TAG_BATCH_BUFFER);
-
- draw.vertex_fetch.code = attribute_fetch_code_buffer;
+ case CELL_CMD_STATE_ATTRIB_FETCH:
+ cmd_state_attrib_fetch((struct cell_attribute_fetch_code *)
+ &buffer[pos+1]);
pos += (1 + ROUNDUP8(sizeof(struct cell_attribute_fetch_code)) / 8);
break;
- }
- case CELL_CMD_STATE_LOGICOP: {
- struct cell_command_logicop *code =
- (struct cell_command_logicop *) &buffer[pos+1];
-
- mfc_get(logicop_code_buffer,
- (unsigned int) code->base, /* src */
- code->size,
- TAG_BATCH_BUFFER,
- 0, /* tid */
- 0 /* rid */);
- wait_on_mask(1 << TAG_BATCH_BUFFER);
-
- spu.logicop = (logicop_func) logicop_code_buffer;
+ case CELL_CMD_STATE_LOGICOP:
+ cmd_state_logicop((struct cell_command_logicop *) &buffer[pos+1]);
pos += (1 + ROUNDUP8(sizeof(struct cell_command_logicop)) / 8);
break;
- }
case CELL_CMD_FLUSH_BUFFER_RANGE: {
struct cell_buffer_range *br = (struct cell_buffer_range *)
&buffer[pos+1];
diff --git a/src/gallium/drivers/cell/spu/spu_main.h b/src/gallium/drivers/cell/spu/spu_main.h
index e962e1426c..4879f8c9c8 100644
--- a/src/gallium/drivers/cell/spu/spu_main.h
+++ b/src/gallium/drivers/cell/spu/spu_main.h
@@ -124,13 +124,13 @@ struct spu_global
struct spu_framebuffer fb;
boolean read_depth;
boolean read_stencil;
- frag_test_func frag_test;
+ frag_test_func frag_test; /**< Current depth/stencil test code */
- boolean read_fb;
- blend_func blend;
+ boolean read_fb; /**< Does current blend mode require framebuffer read? */
+ blend_func blend; /**< Current blend code */
qword const_blend_color[4] ALIGN16_ATTRIB;
- logicop_func logicop;
+ logicop_func logicop; /**< Current logicop code **/
struct pipe_sampler_state sampler[PIPE_MAX_SAMPLERS];
struct spu_texture texture[PIPE_MAX_SAMPLERS];