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authorZou Nan hai <nanhai.zou@intel.com>2007-09-27 16:17:24 +0800
committerZou Nan hai <nanhai.zou@intel.com>2007-09-27 16:17:24 +0800
commitb1e549d1762536ebb3f7c11461c4554d4613c37a (patch)
tree9a8267a1008a9c24ffd558e226066fcbd01c6df2
parent35a0634e358baac832d6e5a76630fcae57a948a7 (diff)
handle INT op, still require high level handle of integer to be correct
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_glsl.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
index f03866d9b9..4bce150491 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
@@ -12,6 +12,7 @@ GLboolean brw_wm_is_glsl(struct gl_fragment_program *fp)
struct prog_instruction *inst = &fp->Base.Instructions[i];
switch (inst->Opcode) {
case OPCODE_IF:
+ case OPCODE_INT:
case OPCODE_ENDIF:
case OPCODE_CAL:
case OPCODE_BRK:
@@ -170,6 +171,24 @@ static void emit_abs( struct brw_wm_compile *c,
brw_set_saturate(p, 0);
}
+static void emit_mov_int( struct brw_wm_compile *c,
+ struct prog_instruction *inst)
+{
+ int i;
+ struct brw_compile *p = &c->func;
+ GLuint mask = inst->DstReg.WriteMask;
+ brw_set_saturate(p, inst->SaturateMode != SATURATE_OFF);
+ for (i = 0; i < 4; i++) {
+ if (mask & (1<<i)) {
+ struct brw_reg src, dst;
+ dst = retype(get_dst_reg(c, inst, i, 1), BRW_REGISTER_TYPE_D);
+ src = retype(get_src_reg(c, &inst->SrcReg[0], i, 1), BRW_REGISTER_TYPE_D);
+ brw_MOV(p, dst, src);
+ }
+ }
+ brw_set_saturate(p, 0);
+}
+
static void emit_mov( struct brw_wm_compile *c,
struct prog_instruction *inst)
{
@@ -1107,6 +1126,9 @@ static void brw_wm_emit_glsl(struct brw_wm_compile *c)
case OPCODE_LRP:
emit_lrp(c, inst);
break;
+ case OPCODE_INT:
+ emit_mov_int(c, inst);
+ break;
case OPCODE_MOV:
emit_mov(c, inst);
break;