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| author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-09-30 10:49:47 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-09-30 10:51:26 +0800 |
| commit | 72b368ae69bc037681ab4e458296c07cb04349be (patch) | |
| tree | c490c5be2f6d56bbaf3509bacb507a215eac78bc /configs/hpux11-64 | |
| parent | 83278d384ee123fa207229cc444f6e77e2d9a0d2 (diff) | |
i965: always set tiling for fbo depth buffer on sandybridge
Sandybridge requires depth buffer must be tiling.
Fix 'fbo_firecube' demo.
Diffstat (limited to 'configs/hpux11-64')
0 files changed, 0 insertions, 0 deletions