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| author | Eric Anholt <eric@anholt.net> | 2010-10-14 11:27:17 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-10-14 12:02:54 -0700 |
| commit | 5dd07b442e02696bf0ec5d4e3b4be1674519664a (patch) | |
| tree | f80e5216781b8abc78cfcc1cdc9a8060f8212ec6 /include | |
| parent | d5599c0b6a22cd0bbc475ec715824660144d02a0 (diff) | |
i965: Add peepholing of conditional mod generation from expressions.
This cuts usually 2 out of 3 instructions for flag reg generation (if
statements, conditional assignment) by producing the conditional mod
in the expression representing the boolean value.
Fixes glsl-fs-vec4-indexing-temp-dst-in-nested-loop-combined (register
allocation no longer fails for the conditional generation
proliferation)
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions