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authorRoland Scheidegger <sroland@vmware.com>2010-04-30 15:27:13 +0200
committerRoland Scheidegger <sroland@vmware.com>2010-04-30 15:27:13 +0200
commit7662e3519bef3802024da3050b886068281e02b1 (patch)
treebc5bf675e67febffaf9e4d1fadd139e8c253ae32 /src/gallium/auxiliary/tgsi/tgsi_sanity.c
parent9a966b93c03aecac8eb72e6133aa9a2f2c7673f3 (diff)
parent7c769bef052fc1936d7ab33e291bb4646dc5b0d1 (diff)
Merge commit 'origin/master' into gallium-msaa
Diffstat (limited to 'src/gallium/auxiliary/tgsi/tgsi_sanity.c')
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_sanity.c19
1 files changed, 0 insertions, 19 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_sanity.c b/src/gallium/auxiliary/tgsi/tgsi_sanity.c
index 371f690b29..76b7564cc3 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_sanity.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_sanity.c
@@ -346,25 +346,6 @@ iter_instruction(
}
}
- switch (inst->Instruction.Opcode) {
- case TGSI_OPCODE_BGNFOR:
- case TGSI_OPCODE_ENDFOR:
- if (inst->Dst[0].Register.File != TGSI_FILE_LOOP ||
- inst->Dst[0].Register.Index != 0) {
- report_error(ctx, "Destination register must be LOOP[0]");
- }
- break;
- }
-
- switch (inst->Instruction.Opcode) {
- case TGSI_OPCODE_BGNFOR:
- if (inst->Src[0].Register.File != TGSI_FILE_CONSTANT &&
- inst->Src[0].Register.File != TGSI_FILE_IMMEDIATE) {
- report_error(ctx, "Source register file must be either CONST or IMM");
- }
- break;
- }
-
ctx->num_instructions++;
return TRUE;