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authorJonathan White <jwhite@tungstengraphics.com>2008-09-19 12:59:36 -0600
committerJonathan White <jwhite@tungstengraphics.com>2008-09-19 13:00:28 -0600
commite9c05c5b82fdae75a3dccad23203987c277572b0 (patch)
tree90ebbdacbc9c3ee46ba0ab3bd1ed613f1741383c /src/gallium/drivers/cell/ppu
parent7abf2358d739b126336c4837156816ce03f2b9d6 (diff)
cell: Fixed bugs with DP3 and DP4, they match softpipe results now.
Diffstat (limited to 'src/gallium/drivers/cell/ppu')
-rw-r--r--src/gallium/drivers/cell/ppu/cell_gen_fp.c40
1 files changed, 37 insertions, 3 deletions
diff --git a/src/gallium/drivers/cell/ppu/cell_gen_fp.c b/src/gallium/drivers/cell/ppu/cell_gen_fp.c
index d835aae255..a84b565e5c 100644
--- a/src/gallium/drivers/cell/ppu/cell_gen_fp.c
+++ b/src/gallium/drivers/cell/ppu/cell_gen_fp.c
@@ -76,7 +76,7 @@ struct codegen
/** Per-instruction temps / intermediate temps */
int num_itemps;
- int itemps[4];
+ int itemps[10];
/** Current IF/ELSE/ENDIF nesting level */
int if_nesting;
@@ -586,9 +586,10 @@ emit_DP3(struct codegen *gen, const struct tgsi_full_instruction *inst)
for (ch = 0; ch < 4; ch++) {
if (inst->FullDstRegisters[0].DstRegister.WriteMask & (1 << ch)) {
store_dest_reg(gen, d_reg, ch, &inst->FullDstRegisters[0]);
- free_itemps(gen);
}
}
+
+ free_itemps(gen);
return true;
}
@@ -625,9 +626,10 @@ emit_DP4(struct codegen *gen, const struct tgsi_full_instruction *inst)
for (ch = 0; ch < 4; ch++) {
if (inst->FullDstRegisters[0].DstRegister.WriteMask & (1 << ch)) {
store_dest_reg(gen, d_reg, ch, &inst->FullDstRegisters[0]);
- free_itemps(gen);
}
}
+
+ free_itemps(gen);
return true;
}
@@ -854,6 +856,38 @@ emit_CMP(struct codegen *gen, const struct tgsi_full_instruction *inst)
}
/**
+ * Emit floor. See emit_SGT for comments.
+ */
+static boolean
+emit_FLR(struct codegen *gen, const struct tgsi_full_instruction *inst)
+{
+ int ch;
+
+ spe_comment(gen->f, -4, "FLR:");
+
+ for (ch = 0; ch < 4; ch++) {
+ if (inst->FullDstRegisters[0].DstRegister.WriteMask & (1 << ch)) {
+ int s1_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
+ int s2_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[1]);
+ int s3_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[2]);
+ int d_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ int zero_reg = get_itemp(gen);
+
+ spe_xor(gen->f, zero_reg, zero_reg, zero_reg);
+
+ /* d = (s1 < 0) ? s2 : s3 */
+ spe_fcgt(gen->f, d_reg, zero_reg, s1_reg);
+ spe_selb(gen->f, d_reg, s3_reg, s2_reg, d_reg);
+
+ store_dest_reg(gen, d_reg, ch, &inst->FullDstRegisters[0]);
+ free_itemps(gen);
+ }
+ }
+
+ return true;
+}
+
+/**
* Emit max. See emit_SGT for comments.
*/
static boolean