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authorDaniel Vetter <daniel.vetter@ffwll.ch>2010-11-19 23:38:19 +0100
committerJakob Bornecrantz <wallbraker@gmail.com>2010-11-21 16:41:18 +0100
commitaba728eb255380ac3c73ba7c9a5ff40bd68705bf (patch)
tree0ba4ba23f4e8b0081dda3f95b086ae73397930eb /src/gallium/drivers/i915/i915_resource_texture.c
parentf77a2690b463aa36297aec2a5035a9de68268dd9 (diff)
i915g: s/hw_tiled/tiling
More in line with other intel drivers. Change to use enum by Jakob Bornecrantz. Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
Diffstat (limited to 'src/gallium/drivers/i915/i915_resource_texture.c')
-rw-r--r--src/gallium/drivers/i915/i915_resource_texture.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/gallium/drivers/i915/i915_resource_texture.c b/src/gallium/drivers/i915/i915_resource_texture.c
index eb040fea66..d45346b32a 100644
--- a/src/gallium/drivers/i915/i915_resource_texture.c
+++ b/src/gallium/drivers/i915/i915_resource_texture.c
@@ -165,7 +165,7 @@ i9x5_scanout_layout(struct i915_texture *tex)
if (pt->width0 >= 240) {
tex->stride = get_pot_stride(pt->format, pt->width0);
tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8);
- tex->hw_tiled = I915_TILE_X;
+ tex->tiling = I915_TILE_X;
} else if (pt->width0 == 64 && pt->height0 == 64) {
tex->stride = get_pot_stride(pt->format, pt->width0);
tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8);
@@ -202,7 +202,7 @@ i9x5_display_target_layout(struct i915_texture *tex)
tex->stride = get_pot_stride(pt->format, pt->width0);
tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8);
- tex->hw_tiled = I915_TILE_X;
+ tex->tiling = I915_TILE_X;
#if DEBUG_TEXTURE
debug_printf("%s size: %d,%d,%d offset %d,%d (0x%x)\n", __FUNCTION__,
@@ -790,8 +790,8 @@ i915_texture_create(struct pipe_screen *screen,
goto fail;
/* setup any hw fences */
- if (tex->hw_tiled) {
- iws->buffer_set_fence_reg(iws, tex->buffer, tex->stride, tex->hw_tiled);
+ if (tex->tiling) {
+ iws->buffer_set_fence_reg(iws, tex->buffer, tex->stride, tex->tiling);
}