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authorDave Airlie <airlied@gmail.com>2010-12-30 19:16:16 +1000
committerDave Airlie <airlied@gmail.com>2011-01-09 17:21:10 +1000
commit5826967d2e6131714081287be5425b68702f1ca5 (patch)
treecd41c7fac8805d77263dad31c1d3f12aa9e059b2 /src/gallium/drivers/i965/brw_gs.c
parent3332229b3ba7a183a9f120ae4bbf9865e96df110 (diff)
i965g: update to similiar gen stuff as i965
Diffstat (limited to 'src/gallium/drivers/i965/brw_gs.c')
-rw-r--r--src/gallium/drivers/i965/brw_gs.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/i965/brw_gs.c b/src/gallium/drivers/i965/brw_gs.c
index 06826635a8..2a8165b83e 100644
--- a/src/gallium/drivers/i965/brw_gs.c
+++ b/src/gallium/drivers/i965/brw_gs.c
@@ -51,13 +51,13 @@ static enum pipe_error compile_gs_prog( struct brw_context *brw,
memset(&c, 0, sizeof(c));
c.key = *key;
- c.need_ff_sync = BRW_IS_IGDNG(brw);
+ c.need_ff_sync = brw->gen == 5;
/* Need to locate the two positions present in vertex + header.
* These are currently hardcoded:
*/
c.nr_attrs = c.key.nr_attrs;
- if (BRW_IS_IGDNG(brw))
+ if (brw->gen == 5)
c.nr_regs = (c.nr_attrs + 1) / 2 + 3; /* are vertices packed, or reg-aligned? */
else
c.nr_regs = (c.nr_attrs + 1) / 2 + 1; /* are vertices packed, or reg-aligned? */