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authorZack Rusin <zackr@vmware.com>2009-02-02 23:47:16 -0500
committerZack Rusin <zackr@vmware.com>2009-02-02 23:47:16 -0500
commit5069bfed29bcee2c89c36c74c6d65d388eb7792e (patch)
tree2aef5035140ca24eef97b5d328e0c29d0460f3a8 /src/gallium/drivers/nv30/nv30_state_fb.c
parentdf73c964d85d2f44d8c62558b5752b2f4443763f (diff)
gallium: remove pipe_buffer from surfaces
this change disassociates, at least from the driver perspective, the surface from buffer. surfaces are technically now views on the textures so make it so by hiding the buffer in the internals of textures.
Diffstat (limited to 'src/gallium/drivers/nv30/nv30_state_fb.c')
-rw-r--r--src/gallium/drivers/nv30/nv30_state_fb.c16
1 files changed, 10 insertions, 6 deletions
diff --git a/src/gallium/drivers/nv30/nv30_state_fb.c b/src/gallium/drivers/nv30/nv30_state_fb.c
index 8536acc570..77368cb205 100644
--- a/src/gallium/drivers/nv30/nv30_state_fb.c
+++ b/src/gallium/drivers/nv30/nv30_state_fb.c
@@ -12,6 +12,7 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30)
unsigned rt_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM;
unsigned w = fb->width;
unsigned h = fb->height;
+ struct nv30_miptree *nv30mt;
rt_enable = 0;
for (i = 0; i < fb->nr_cbufs; i++) {
@@ -77,34 +78,37 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30)
pitch |= (pitch << 16);
}
+ nv30mt = (struct nv30_miptree *)rt[0]->texture;
so_method(so, nv30->screen->rankine, NV34TCL_DMA_COLOR0, 1);
- so_reloc (so, rt[0]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
+ so_reloc (so, nv30mt->buffer, 0, rt_flags | NOUVEAU_BO_OR,
nv30->nvws->channel->vram->handle,
nv30->nvws->channel->gart->handle);
so_method(so, nv30->screen->rankine, NV34TCL_COLOR0_PITCH, 2);
so_data (so, pitch);
- so_reloc (so, rt[0]->buffer, rt[0]->offset, rt_flags |
+ so_reloc (so, nv30mt->buffer, rt[0]->offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
}
if (rt_enable & NV34TCL_RT_ENABLE_COLOR1) {
+ nv30mt = (struct nv30_miptree *)rt[1]->texture;
so_method(so, nv30->screen->rankine, NV34TCL_DMA_COLOR1, 1);
- so_reloc (so, rt[1]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
+ so_reloc (so, nv30mt->buffer, 0, rt_flags | NOUVEAU_BO_OR,
nv30->nvws->channel->vram->handle,
nv30->nvws->channel->gart->handle);
so_method(so, nv30->screen->rankine, NV34TCL_COLOR1_OFFSET, 2);
- so_reloc (so, rt[1]->buffer, rt[1]->offset, rt_flags |
+ so_reloc (so, nv30mt->buffer, rt[1]->offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
so_data (so, rt[1]->stride);
}
if (zeta_format) {
+ nv30mt = (struct nv30_miptree *)zeta->texture;
so_method(so, nv30->screen->rankine, NV34TCL_DMA_ZETA, 1);
- so_reloc (so, zeta->buffer, 0, rt_flags | NOUVEAU_BO_OR,
+ so_reloc (so, nv30mt->buffer, 0, rt_flags | NOUVEAU_BO_OR,
nv30->nvws->channel->vram->handle,
nv30->nvws->channel->gart->handle);
so_method(so, nv30->screen->rankine, NV34TCL_ZETA_OFFSET, 1);
- so_reloc (so, zeta->buffer, zeta->offset, rt_flags |
+ so_reloc (so, nv30mt->buffer, zeta->offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
/* TODO: allocate LMA depth buffer */
}