nv30, nv40: unify all structures and headers, except shaders

This patch unifies nv[34]0_screen.h, nv[34]0_context.h and
nv[34]0_state.h

The unified files are put in a new "nvfx" directory.

nv30_context.h and nv40_context.h still exist to hold the function
prototypes and include nvfx_context.h

nv[34]0_screen.h and nv[34]0_state.h are deleted, replaced by the
unified versions.

nv40 includes some extra fields for swtnl and user clip planes
support.

These fields will be unused on nv30 until that functionality gets
added to it too (by unification with nv40).

1 files changed, 42 insertions, 42 deletions

diff --git a/src/gallium/drivers/nv40/nv40_vertprog.c b/src/gallium/drivers/nv40/nv40_vertprog.c
index 96f2743429..a199f0766e 100644
--- a/src/gallium/drivers/nv40/nv40_vertprog.c
+++ b/src/gallium/drivers/nv40/nv40_vertprog.c
@@ -8,7 +8,7 @@
 #include "tgsi/tgsi_util.h"
 
 #include "nv40_context.h"
-#include "nv40_state.h"
+#include "nvfx_state.h"
 
 /* TODO (at least...):
  *  1. Indexed consts  + ARL
@@ -41,9 +41,9 @@
 #define NV40_VP_INST_DEST_CLIP(n) ((~0 - 6) + (n))
 
 struct nv40_vpc {
-	struct nv40_vertex_program *vp;
+	struct nvfx_vertex_program *vp;
 
-	struct nv40_vertex_program_exec *vpi;
+	struct nvfx_vertex_program_exec *vpi;
 
 	unsigned r_temps;
 	unsigned r_temps_discard;
@@ -83,8 +83,8 @@ release_temps(struct nv40_vpc *vpc)
 static struct nv40_sreg
 constant(struct nv40_vpc *vpc, int pipe, float x, float y, float z, float w)
 {
-	struct nv40_vertex_program *vp = vpc->vp;
-	struct nv40_vertex_program_data *vpd;
+	struct nvfx_vertex_program *vp = vpc->vp;
+	struct nvfx_vertex_program_data *vpd;
 	int idx;
 
 	if (pipe >= 0) {
@@ -112,7 +112,7 @@ constant(struct nv40_vpc *vpc, int pipe, float x, float y, float z, float w)
 static void
 emit_src(struct nv40_vpc *vpc, uint32_t *hw, int pos, struct nv40_sreg src)
 {
-	struct nv40_vertex_program *vp = vpc->vp;
+	struct nvfx_vertex_program *vp = vpc->vp;
 	uint32_t sr = 0;
 
 	switch (src.type) {
@@ -176,7 +176,7 @@ emit_src(struct nv40_vpc *vpc, uint32_t *hw, int pos, struct nv40_sreg src)
 static void
 emit_dst(struct nv40_vpc *vpc, uint32_t *hw, int slot, struct nv40_sreg dst)
 {
-	struct nv40_vertex_program *vp = vpc->vp;
+	struct nvfx_vertex_program *vp = vpc->vp;
 
 	switch (dst.type) {
 	case NV40SR_TEMP:
@@ -259,7 +259,7 @@ nv40_vp_arith(struct nv40_vpc *vpc, int slot, int op,
 	      struct nv40_sreg s0, struct nv40_sreg s1,
 	      struct nv40_sreg s2)
 {
-	struct nv40_vertex_program *vp = vpc->vp;
+	struct nvfx_vertex_program *vp = vpc->vp;
 	uint32_t *hw;
 
 	vp->insns = realloc(vp->insns, ++vp->nr_insns * sizeof(*vpc->vpi));
@@ -723,8 +723,8 @@ nv40_vertprog_prepare(struct nv40_vpc *vpc)
 }
 
 static void
-nv40_vertprog_translate(struct nv40_context *nv40,
-			struct nv40_vertex_program *vp)
+nv40_vertprog_translate(struct nvfx_context *nvfx,
+			struct nvfx_vertex_program *vp)
 {
 	struct tgsi_parse_context parse;
 	struct nv40_vpc *vpc = NULL;
@@ -798,10 +798,10 @@ nv40_vertprog_translate(struct nv40_context *nv40,
 		struct nv40_sreg cdst = nv40_sr(NV40SR_OUTPUT,
 						NV40_VP_INST_DEST_CLIP(i));
 		struct nv40_sreg ceqn = constant(vpc, -1,
-						 nv40->clip.ucp[i][0],
-						 nv40->clip.ucp[i][1],
-						 nv40->clip.ucp[i][2],
-						 nv40->clip.ucp[i][3]);
+						 nvfx->clip.ucp[i][0],
+						 nvfx->clip.ucp[i][1],
+						 nvfx->clip.ucp[i][2],
+						 nvfx->clip.ucp[i][3]);
 		struct nv40_sreg htmp = vpc->r_result[vpc->hpos_idx];
 		unsigned mask;
 
@@ -831,28 +831,28 @@ out_err:
 }
 
 static boolean
-nv40_vertprog_validate(struct nv40_context *nv40)
+nv40_vertprog_validate(struct nvfx_context *nvfx)
 { 
-	struct pipe_screen *pscreen = nv40->pipe.screen;
-	struct nv40_screen *screen = nv40->screen;
+	struct pipe_screen *pscreen = nvfx->pipe.screen;
+	struct nvfx_screen *screen = nvfx->screen;
 	struct nouveau_channel *chan = screen->base.channel;
 	struct nouveau_grobj *eng3d = screen->eng3d;
-	struct nv40_vertex_program *vp;
+	struct nvfx_vertex_program *vp;
 	struct pipe_buffer *constbuf;
 	boolean upload_code = FALSE, upload_data = FALSE;
 	int i;
 
-	if (nv40->render_mode == HW) {
-		vp = nv40->vertprog;
-		constbuf = nv40->constbuf[PIPE_SHADER_VERTEX];
+	if (nvfx->render_mode == HW) {
+		vp = nvfx->vertprog;
+		constbuf = nvfx->constbuf[PIPE_SHADER_VERTEX];
 
-		if ((nv40->dirty & NV40_NEW_UCP) ||
-		    memcmp(&nv40->clip, &vp->ucp, sizeof(vp->ucp))) {
-			nv40_vertprog_destroy(nv40, vp);
-			memcpy(&vp->ucp, &nv40->clip, sizeof(vp->ucp));
+		if ((nvfx->dirty & NVFX_NEW_UCP) ||
+		    memcmp(&nvfx->clip, &vp->ucp, sizeof(vp->ucp))) {
+			nv40_vertprog_destroy(nvfx, vp);
+			memcpy(&vp->ucp, &nvfx->clip, sizeof(vp->ucp));
 		}
 	} else {
-		vp = nv40->swtnl.vertprog;
+		vp = nvfx->swtnl.vertprog;
 		constbuf = NULL;
 	}
 
@@ -860,23 +860,23 @@ nv40_vertprog_validate(struct nv40_context *nv40)
 	if (vp->translated)
 		goto check_gpu_resources;
 
-	nv40->fallback_swtnl &= ~NV40_NEW_VERTPROG;
-	nv40_vertprog_translate(nv40, vp);
+	nvfx->fallback_swtnl &= ~NVFX_NEW_VERTPROG;
+	nv40_vertprog_translate(nvfx, vp);
 	if (!vp->translated) {
-		nv40->fallback_swtnl |= NV40_NEW_VERTPROG;
+		nvfx->fallback_swtnl |= NVFX_NEW_VERTPROG;
 		return FALSE;
 	}
 
 check_gpu_resources:
 	/* Allocate hw vtxprog exec slots */
 	if (!vp->exec) {
-		struct nouveau_resource *heap = nv40->screen->vp_exec_heap;
+		struct nouveau_resource *heap = nvfx->screen->vp_exec_heap;
 		struct nouveau_stateobj *so;
 		uint vplen = vp->nr_insns;
 
 		if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) {
 			while (heap->next && heap->size < vplen) {
-				struct nv40_vertex_program *evict;
+				struct nvfx_vertex_program *evict;
 				
 				evict = heap->next->priv;
 				nouveau_resource_free(&evict->exec);
@@ -902,11 +902,11 @@ check_gpu_resources:
 
 	/* Allocate hw vtxprog const slots */
 	if (vp->nr_consts && !vp->data) {
-		struct nouveau_resource *heap = nv40->screen->vp_data_heap;
+		struct nouveau_resource *heap = nvfx->screen->vp_data_heap;
 
 		if (nouveau_resource_alloc(heap, vp->nr_consts, vp, &vp->data)) {
 			while (heap->next && heap->size < vp->nr_consts) {
-				struct nv40_vertex_program *evict;
+				struct nvfx_vertex_program *evict;
 				
 				evict = heap->next->priv;
 				nouveau_resource_free(&evict->data);
@@ -929,7 +929,7 @@ check_gpu_resources:
 	 */
 	if (vp->exec_start != vp->exec->start) {
 		for (i = 0; i < vp->nr_insns; i++) {
-			struct nv40_vertex_program_exec *vpi = &vp->insns[i];
+			struct nvfx_vertex_program_exec *vpi = &vp->insns[i];
 
 			if (vpi->has_branch_offset) {
 				assert(0);
@@ -941,7 +941,7 @@ check_gpu_resources:
 
 	if (vp->nr_consts && vp->data_start != vp->data->start) {
 		for (i = 0; i < vp->nr_insns; i++) {
-			struct nv40_vertex_program_exec *vpi = &vp->insns[i];
+			struct nvfx_vertex_program_exec *vpi = &vp->insns[i];
 
 			if (vpi->const_index >= 0) {
 				vpi->data[1] &= ~NV40_VP_INST_CONST_SRC_MASK;
@@ -965,7 +965,7 @@ check_gpu_resources:
 		}
 
 		for (i = 0; i < vp->nr_consts; i++) {
-			struct nv40_vertex_program_data *vpd = &vp->consts[i];
+			struct nvfx_vertex_program_data *vpd = &vp->consts[i];
 
 			if (vpd->index >= 0) {
 				if (!upload_data &&
@@ -1003,8 +1003,8 @@ check_gpu_resources:
 		}
 	}
 
-	if (vp->so != nv40->state.hw[NV40_STATE_VERTPROG]) {
-		so_ref(vp->so, &nv40->state.hw[NV40_STATE_VERTPROG]);
+	if (vp->so != nvfx->state.hw[NVFX_STATE_VERTPROG]) {
+		so_ref(vp->so, &nvfx->state.hw[NVFX_STATE_VERTPROG]);
 		return TRUE;
 	}
 
@@ -1012,7 +1012,7 @@ check_gpu_resources:
 }
 
 void
-nv40_vertprog_destroy(struct nv40_context *nv40, struct nv40_vertex_program *vp)
+nv40_vertprog_destroy(struct nvfx_context *nvfx, struct nvfx_vertex_program *vp)
 {
 	vp->translated = FALSE;
 
@@ -1038,11 +1038,11 @@ nv40_vertprog_destroy(struct nv40_context *nv40, struct nv40_vertex_program *vp)
 	so_ref(NULL, &vp->so);
 }
 
-struct nv40_state_entry nv40_state_vertprog = {
+struct nvfx_state_entry nv40_state_vertprog = {
 	.validate = nv40_vertprog_validate,
 	.dirty = {
-		.pipe = NV40_NEW_VERTPROG | NV40_NEW_UCP,
-		.hw = NV40_STATE_VERTPROG,
+		.pipe = NVFX_NEW_VERTPROG | NVFX_NEW_UCP,
+		.hw = NVFX_STATE_VERTPROG,
 	}
 };