Merge remote branch 'origin/master' into radeon-rewrite

1 files changed, 26 insertions, 48 deletions

diff --git a/src/gallium/drivers/nv50/nv50_clear.c b/src/gallium/drivers/nv50/nv50_clear.c
index db44a9da0e..33427a15a5 100644
--- a/src/gallium/drivers/nv50/nv50_clear.c
+++ b/src/gallium/drivers/nv50/nv50_clear.c
@@ -27,64 +27,42 @@
 #include "nv50_context.h"
 
 void
-nv50_clear(struct pipe_context *pipe, struct pipe_surface *ps,
-	   unsigned clearValue)
+nv50_clear(struct pipe_context *pipe, unsigned buffers,
+	   const float *rgba, double depth, unsigned stencil)
 {
 	struct nv50_context *nv50 = nv50_context(pipe);
 	struct nouveau_channel *chan = nv50->screen->nvws->channel;
 	struct nouveau_grobj *tesla = nv50->screen->tesla;
-	struct pipe_framebuffer_state fb, s_fb = nv50->framebuffer;
-	struct pipe_scissor_state sc, s_sc = nv50->scissor;
-	unsigned dirty = nv50->dirty;
+	struct pipe_framebuffer_state *fb = &nv50->framebuffer;
+	unsigned mode = 0, i;
 
-	nv50->dirty = 0;
+	if (!nv50_state_validate(nv50))
+		return;
 
-	if (ps->format == PIPE_FORMAT_Z24S8_UNORM ||
-	    ps->format == PIPE_FORMAT_Z16_UNORM) {
-		fb.nr_cbufs = 0;
-		fb.zsbuf = ps;
-	} else {
-		fb.nr_cbufs = 1;
-		fb.cbufs[0] = ps;
-		fb.zsbuf = NULL;
+	if (buffers & PIPE_CLEAR_COLOR && fb->nr_cbufs) {
+		BEGIN_RING(chan, tesla, NV50TCL_CLEAR_COLOR(0), 4);
+		OUT_RING  (chan, fui(rgba[0]));
+		OUT_RING  (chan, fui(rgba[1]));
+		OUT_RING  (chan, fui(rgba[2]));
+		OUT_RING  (chan, fui(rgba[3]));
+		mode |= 0x3c;
 	}
-	fb.width = ps->width;
-	fb.height = ps->height;
-	pipe->set_framebuffer_state(pipe, &fb);
 
-	sc.minx = sc.miny = 0;
-	sc.maxx = fb.width;
-	sc.maxy = fb.height;
-	pipe->set_scissor_state(pipe, &sc);
+	if (buffers & PIPE_CLEAR_DEPTHSTENCIL) {
+		BEGIN_RING(chan, tesla, NV50TCL_CLEAR_DEPTH, 1);
+		OUT_RING  (chan, fui(depth));
+		BEGIN_RING(chan, tesla, NV50TCL_CLEAR_STENCIL, 1);
+		OUT_RING  (chan, stencil & 0xff);
 
-	nv50_state_validate(nv50);
-
-	switch (ps->format) {
-	case PIPE_FORMAT_A8R8G8B8_UNORM:
-		BEGIN_RING(chan, tesla, 0x0d80, 4);
-		OUT_RINGf (chan, ubyte_to_float((clearValue >> 16) & 0xff));
-		OUT_RINGf (chan, ubyte_to_float((clearValue >>  8) & 0xff));
-		OUT_RINGf (chan, ubyte_to_float((clearValue >>  0) & 0xff));
-		OUT_RINGf (chan, ubyte_to_float((clearValue >> 24) & 0xff));
-		BEGIN_RING(chan, tesla, 0x19d0, 1);
-		OUT_RING  (chan, 0x3c);
-		break;
-	case PIPE_FORMAT_Z24S8_UNORM:
-		BEGIN_RING(chan, tesla, 0x0d90, 1);
-		OUT_RINGf (chan, (float)(clearValue >> 8) * (1.0 / 16777215.0));
-		BEGIN_RING(chan, tesla, 0x0da0, 1);
-		OUT_RING  (chan, clearValue & 0xff);
-		BEGIN_RING(chan, tesla, 0x19d0, 1);
-		OUT_RING  (chan, 0x03);
-		break;
-	default:
-		pipe->surface_fill(pipe, ps, 0, 0, ps->width, ps->height,
-				   clearValue);
-		break;
+		mode |= 0x03;
 	}
 
-	pipe->set_framebuffer_state(pipe, &s_fb);
-	pipe->set_scissor_state(pipe, &s_sc);
-	nv50->dirty |= dirty;
+	BEGIN_RING(chan, tesla, NV50TCL_CLEAR_BUFFERS, 1);
+	OUT_RING  (chan, mode);
+
+	for (i = 1; i < fb->nr_cbufs; i++) {
+		BEGIN_RING(chan, tesla, NV50TCL_CLEAR_BUFFERS, 1);
+		OUT_RING  (chan, (i << 6) | 0x3c);
+	}
 }