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| author | Christoph Bumiller <e0425955@student.tuwien.ac.at> | 2009-08-15 16:22:27 +0200 |
|---|---|---|
| committer | Christoph Bumiller <e0425955@student.tuwien.ac.at> | 2009-08-15 16:22:27 +0200 |
| commit | a2af40b846e0b510887aaf15c2777387a3caae62 (patch) | |
| tree | bcd09189a63f5d1a62aa5497a6bec5f5553aae97 /src/gallium/drivers/nv50/nv50_state_validate.c | |
| parent | f2daded8123c0d82e4cd29710a5b2dfcc99068a1 (diff) | |
nv50: align registers used with TEX to 4
The TEX instruction is passed the first index of a contiguous
range of 4 TEMP registers that contain coordinates / LOD and,
after execution, the texel values.
It seems the first index is required to be a multiple of 4 on
some (older ?) cards.
Diffstat (limited to 'src/gallium/drivers/nv50/nv50_state_validate.c')
0 files changed, 0 insertions, 0 deletions