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authorChristoph Bumiller <e0425955@student.tuwien.ac.at>2009-08-15 16:22:27 +0200
committerChristoph Bumiller <e0425955@student.tuwien.ac.at>2009-08-15 16:22:27 +0200
commita2af40b846e0b510887aaf15c2777387a3caae62 (patch)
treebcd09189a63f5d1a62aa5497a6bec5f5553aae97 /src/gallium/drivers/nv50
parentf2daded8123c0d82e4cd29710a5b2dfcc99068a1 (diff)
nv50: align registers used with TEX to 4
The TEX instruction is passed the first index of a contiguous range of 4 TEMP registers that contain coordinates / LOD and, after execution, the texel values. It seems the first index is required to be a multiple of 4 on some (older ?) cards.
Diffstat (limited to 'src/gallium/drivers/nv50')
-rw-r--r--src/gallium/drivers/nv50/nv50_program.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c
index fefccd0b2a..e45769c069 100644
--- a/src/gallium/drivers/nv50/nv50_program.c
+++ b/src/gallium/drivers/nv50/nv50_program.c
@@ -251,7 +251,7 @@ alloc_temp4(struct nv50_pc *pc, struct nv50_reg *dst[4], int idx)
if (pc->r_temp[idx] || pc->r_temp[idx + 1] ||
pc->r_temp[idx + 2] || pc->r_temp[idx + 3])
- return alloc_temp4(pc, dst, idx + 1);
+ return alloc_temp4(pc, dst, idx + 4);
for (i = 0; i < 4; i++) {
dst[i] = CALLOC_STRUCT(nv50_reg);
@@ -1014,6 +1014,7 @@ emit_tex(struct nv50_pc *pc, struct nv50_reg **dst, unsigned mask,
break;
}
+ /* some cards need t[0]'s hw index to be a multiple of 4 */
alloc_temp4(pc, t, 0);
if (proj) {