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author | Chris Wilson <chris@chris-wilson.co.uk> | 2011-03-03 18:15:03 +0000 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2011-03-04 09:58:31 +0000 |
commit | 18dd7932c7fc13e230384bcab08311a5de5d6de7 (patch) | |
tree | 91a6e1e76e8034375b0493fcd63d8d3ed6d2d725 /src/gallium/drivers/nvc0 | |
parent | 1546291e5b8d3ac02f5bee38252f9d479bcf95cc (diff) |
i965: Handle URB_FENCE erratum for Broadwater
There is a silicon bug which causes unpredictable behaviour if the
URB_FENCE command should cross a cache-line boundary. Pad before the
command to avoid such occurrences. As this command only applies to
gen4/5, do the fixup unconditionally as the specs do not actually state
for which chip it was fixed (and the cost is negligible)...
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'src/gallium/drivers/nvc0')
0 files changed, 0 insertions, 0 deletions