diff options
| author | Luca Barbieri <luca@luca-barbieri.com> | 2010-03-23 16:34:51 +0100 |
|---|---|---|
| committer | Luca Barbieri <luca@luca-barbieri.com> | 2010-03-23 18:10:59 +0100 |
| commit | 208f5bf3cd8555f5b896c3e9d60c26f1bdb8683c (patch) | |
| tree | 0656f60ce6e17d5b95d7833fe32e0d0fda97bd48 /src/gallium/drivers/nvfx/nvfx_screen.c | |
| parent | 9f0e302cc792f21c6523a85c353e053f942cd035 (diff) | |
nvfx: delay allocation of buffers in GART/VRAM to validation time
Currently we allocate buffers in GART or VRAM at creation time.
However, when using swtnl, this results in reads from uncached
memory, which drastically impair performance.
So, for now, cause nouveau_screen.c to not pass any placement flags
to buffer creation, so that the buffers are moved later.
Previously libdrm itself did this, but was changed to not to do it.
This may introduce an extra copy in normal usage, but this currently
does not seem to introduce significant performance degradation.
This will be revisited when pipebuffer is integrated.
Note that for AGP systems, properly solving this may be complex
since currently there is no fast way of reading from GART/VRAM.
We will probably need to try mapping AGP as writethrough and, in
addition, make buffer creation more aware of future buffer usage.
Diffstat (limited to 'src/gallium/drivers/nvfx/nvfx_screen.c')
| -rw-r--r-- | src/gallium/drivers/nvfx/nvfx_screen.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/gallium/drivers/nvfx/nvfx_screen.c b/src/gallium/drivers/nvfx/nvfx_screen.c index 8138715cc7..6cbd8b23e1 100644 --- a/src/gallium/drivers/nvfx/nvfx_screen.c +++ b/src/gallium/drivers/nvfx/nvfx_screen.c @@ -68,11 +68,9 @@ nvfx_screen_get_param(struct pipe_screen *pscreen, int param) case PIPE_CAP_BLEND_EQUATION_SEPARATE: return !!screen->is_nv4x; case NOUVEAU_CAP_HW_VTXBUF: - /* TODO: this is almost surely wrong */ - return !!screen->is_nv4x; + return 0; case NOUVEAU_CAP_HW_IDXBUF: - /* TODO: this is also almost surely wrong */ - return screen->is_nv4x && screen->eng3d->grclass == NV40TCL; + return 0; case PIPE_CAP_MAX_COMBINED_SAMPLERS: return 16; case PIPE_CAP_INDEP_BLEND_ENABLE: |