diff options
| author | Luca Barbieri <luca@luca-barbieri.com> | 2010-09-05 10:10:09 +0200 |
|---|---|---|
| committer | Luca Barbieri <luca@luca-barbieri.com> | 2010-09-05 17:52:26 +0200 |
| commit | d46c5ce7b6a707b491a28345e3ee2adfce201632 (patch) | |
| tree | 49bcdfa7790d50ec141e3b6c8dc42604fb3c8428 /src/gallium/drivers/nvfx/nvfx_vertprog.c | |
| parent | 3bca263a92ab206d371e18ac65f6d36cadbc62a5 (diff) | |
nvfx: switch to rules-ng-ng register headers
This is the new register generation toolkit in use by nouveau.
As far as I know, this is the best register description toolkit in
existence, and you should use it too for your hardware :)
Thanks to Marcin Kościelnicki for inventing it and performing
invaluable reverse engineering work of nVidia chips.
Diffstat (limited to 'src/gallium/drivers/nvfx/nvfx_vertprog.c')
| -rw-r--r-- | src/gallium/drivers/nvfx/nvfx_vertprog.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/gallium/drivers/nvfx/nvfx_vertprog.c b/src/gallium/drivers/nvfx/nvfx_vertprog.c index ba4ece7c56..570bb452b5 100644 --- a/src/gallium/drivers/nvfx/nvfx_vertprog.c +++ b/src/gallium/drivers/nvfx/nvfx_vertprog.c @@ -1310,7 +1310,7 @@ nvfx_vertprog_validate(struct nvfx_context *nvfx) * WAIT_RING(chan, 512 * 6); for (i = 0; i < 512; i++) { float v[4] = {0.1, 0,2, 0.3, 0.4}; - OUT_RING(chan, RING_3D(NV34TCL_VP_UPLOAD_CONST_ID, 5)); + OUT_RING(chan, RING_3D(NV30_3D_VP_UPLOAD_CONST_ID, 5)); OUT_RING(chan, i); OUT_RINGp(chan, (uint32_t *)v, 4); printf("frob %i\n", i); @@ -1332,7 +1332,7 @@ nvfx_vertprog_validate(struct nvfx_context *nvfx) //printf("upload into %i + %i: %f %f %f %f\n", vp->data->start, i, vpd->value[0], vpd->value[1], vpd->value[2], vpd->value[3]); - OUT_RING(chan, RING_3D(NV34TCL_VP_UPLOAD_CONST_ID, 5)); + OUT_RING(chan, RING_3D(NV30_3D_VP_UPLOAD_CONST_ID, 5)); OUT_RING(chan, i + vp->data->start); OUT_RINGp(chan, (uint32_t *)vpd->value, 4); } @@ -1341,10 +1341,10 @@ nvfx_vertprog_validate(struct nvfx_context *nvfx) /* Upload vtxprog */ if (upload_code) { WAIT_RING(chan, 2 + 5 * vp->nr_insns); - OUT_RING(chan, RING_3D(NV34TCL_VP_UPLOAD_FROM_ID, 1)); + OUT_RING(chan, RING_3D(NV30_3D_VP_UPLOAD_FROM_ID, 1)); OUT_RING(chan, vp->exec->start); for (i = 0; i < vp->nr_insns; i++) { - OUT_RING(chan, RING_3D(NV34TCL_VP_UPLOAD_INST(0), 4)); + OUT_RING(chan, RING_3D(NV30_3D_VP_UPLOAD_INST(0), 4)); //printf("%08x %08x %08x %08x\n", vp->insns[i].data[0], vp->insns[i].data[1], vp->insns[i].data[2], vp->insns[i].data[3]); OUT_RINGp(chan, vp->insns[i].data, 4); } @@ -1354,10 +1354,10 @@ nvfx_vertprog_validate(struct nvfx_context *nvfx) if(nvfx->dirty & (NVFX_NEW_VERTPROG)) { WAIT_RING(chan, 6); - OUT_RING(chan, RING_3D(NV34TCL_VP_START_FROM_ID, 1)); + OUT_RING(chan, RING_3D(NV30_3D_VP_START_FROM_ID, 1)); OUT_RING(chan, vp->exec->start); if(nvfx->is_nv4x) { - OUT_RING(chan, RING_3D(NV40TCL_VP_ATTRIB_EN, 1)); + OUT_RING(chan, RING_3D(NV40_3D_VP_ATTRIB_EN, 1)); OUT_RING(chan, vp->ir); } } |