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authorMarek Olšák <maraeo@gmail.com>2009-11-03 16:48:48 +0100
committerCorbin Simpson <MostAwesomeDude@gmail.com>2009-11-04 18:19:34 -0800
commitad96c0d851f6c3696fa6ae0c1f6ad56e849bc739 (patch)
tree0c9505747676828b025a3b4475b38e48b2222b0c /src/gallium/drivers/r300
parent898de4a9d5e47ed32c600e5907476fd9338aa7e9 (diff)
r300g: add color channel masking
Signed-off-by: Corbin Simpson <MostAwesomeDude@gmail.com>
Diffstat (limited to 'src/gallium/drivers/r300')
-rw-r--r--src/gallium/drivers/r300/r300_context.h1
-rw-r--r--src/gallium/drivers/r300/r300_emit.c6
-rw-r--r--src/gallium/drivers/r300/r300_state.c14
-rw-r--r--src/gallium/drivers/r300/r300_state_invariant.c3
4 files changed, 19 insertions, 5 deletions
diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h
index ae7015634c..8c65c04d01 100644
--- a/src/gallium/drivers/r300/r300_context.h
+++ b/src/gallium/drivers/r300/r300_context.h
@@ -34,6 +34,7 @@ struct r300_vertex_shader;
struct r300_blend_state {
uint32_t blend_control; /* R300_RB3D_CBLEND: 0x4e04 */
uint32_t alpha_blend_control; /* R300_RB3D_ABLEND: 0x4e08 */
+ uint32_t color_channel_mask; /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */
uint32_t rop; /* R300_RB3D_ROPCNTL: 0x4e18 */
uint32_t dither; /* R300_RB3D_DITHER_CTL: 0x4e50 */
};
diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c
index 79972dbb49..8fe9a68886 100644
--- a/src/gallium/drivers/r300/r300_emit.c
+++ b/src/gallium/drivers/r300/r300_emit.c
@@ -38,10 +38,11 @@ void r300_emit_blend_state(struct r300_context* r300,
struct r300_blend_state* blend)
{
CS_LOCALS(r300);
- BEGIN_CS(7);
- OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2);
+ BEGIN_CS(8);
+ OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 3);
OUT_CS(blend->blend_control);
OUT_CS(blend->alpha_blend_control);
+ OUT_CS(blend->color_channel_mask);
OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop);
OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither);
END_CS;
@@ -313,7 +314,6 @@ void r300_emit_fb_state(struct r300_context* r300,
tex = (struct r300_texture*)surf->texture;
assert(tex && tex->buffer && "cbuf is marked, but NULL!");
- /* XXX I still need to figure out how to set the mipmap level here */
OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1);
OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c
index af063d4b20..242ec9f365 100644
--- a/src/gallium/drivers/r300/r300_state.c
+++ b/src/gallium/drivers/r300/r300_state.c
@@ -100,6 +100,20 @@ static void* r300_create_blend_state(struct pipe_context* pipe,
(state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
}
+ /* Color Channel Mask */
+ if (state->colormask & PIPE_MASK_R) {
+ blend->color_channel_mask |= RB3D_COLOR_CHANNEL_MASK_RED_MASK0;
+ }
+ if (state->colormask & PIPE_MASK_G) {
+ blend->color_channel_mask |= RB3D_COLOR_CHANNEL_MASK_GREEN_MASK0;
+ }
+ if (state->colormask & PIPE_MASK_B) {
+ blend->color_channel_mask |= RB3D_COLOR_CHANNEL_MASK_BLUE_MASK0;
+ }
+ if (state->colormask & PIPE_MASK_A) {
+ blend->color_channel_mask |= RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK0;
+ }
+
if (state->dither) {
blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c
index 4865f16058..7e4d5c7c72 100644
--- a/src/gallium/drivers/r300/r300_state_invariant.c
+++ b/src/gallium/drivers/r300/r300_state_invariant.c
@@ -84,7 +84,7 @@ void r300_emit_invariant_state(struct r300_context* r300)
END_CS;
/* XXX unsorted stuff from surface_fill */
- BEGIN_CS(64 + (caps->has_tcl ? 5 : 0) + (caps->is_r500 ? 4 : 0));
+ BEGIN_CS(62 + (caps->has_tcl ? 5 : 0) + (caps->is_r500 ? 4 : 0));
/* Flush PVS. */
OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
@@ -125,7 +125,6 @@ void r300_emit_invariant_state(struct r300_context* r300)
OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C);
OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525);
OUT_CS_REG(R300_RB3D_CCTL, 0x00000000);
- OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F);
OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000);
if (caps->is_r500) {
OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000);