diff options
| author | Tilman Sauerbeck <tilman@code-monkey.de> | 2010-09-10 18:24:01 +0200 |
|---|---|---|
| committer | Tilman Sauerbeck <tilman@code-monkey.de> | 2010-09-16 11:08:00 +0200 |
| commit | df62338c491f2cace1a48f99de78e83b5edd82fd (patch) | |
| tree | 623ddb5432e509c0dc8ad7fd56a0135ae78fe04f /src/gallium/drivers/r600/r600_shader.c | |
| parent | 2108caac25b375cfa6943fcc6a6386b9a8d4655e (diff) | |
r600g: Use clamped math for RCP and RSQ.
This is likely only correct for OpenGL and not other state trackers.
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
Diffstat (limited to 'src/gallium/drivers/r600/r600_shader.c')
| -rw-r--r-- | src/gallium/drivers/r600/r600_shader.c | 16 |
1 files changed, 14 insertions, 2 deletions
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index 0453138d2b..ad19238697 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -1129,7 +1129,13 @@ static int tgsi_rsq(struct r600_shader_ctx *ctx) int i, r; memset(&alu, 0, sizeof(struct r600_bc_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE); + + /* FIXME: + * For state trackers other than OpenGL, we'll want to use + * _RECIPSQRT_IEEE instead. + */ + alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED); + for (i = 0; i < inst->Instruction.NumSrcRegs; i++) { r = tgsi_src(ctx, &inst->Src[i], &alu.src[i]); if (r) @@ -2633,7 +2639,13 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = { {TGSI_OPCODE_ARL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_arl}, {TGSI_OPCODE_MOV, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV, tgsi_op2}, {TGSI_OPCODE_LIT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_lit}, - {TGSI_OPCODE_RCP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE, tgsi_trans_srcx_replicate}, + + /* FIXME: + * For state trackers other than OpenGL, we'll want to use + * _RECIP_IEEE instead. + */ + {TGSI_OPCODE_RCP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED, tgsi_trans_srcx_replicate}, + {TGSI_OPCODE_RSQ, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_rsq}, {TGSI_OPCODE_EXP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_exp}, {TGSI_OPCODE_LOG, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_log}, |