r600g: rename radeon_ws_bo to r600_bo

Signed-off-by: Jerome Glisse <jglisse@redhat.com>

8 files changed, 42 insertions, 42 deletions

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 70799f6378..6fcb2ae6f3 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -406,7 +406,7 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
 	unsigned format;
 	uint32_t word4 = 0, yuv_format = 0, pitch = 0;
 	unsigned char swizzle[4];
-	struct radeon_ws_bo *bo[2];
+	struct r600_bo *bo[2];
 
 	if (resource == NULL)
 		return NULL;
@@ -539,7 +539,7 @@ static void evergreen_delete_state(struct pipe_context *ctx, void *state)
 		rctx->states[rstate->id] = NULL;
 	}
 	for (int i = 0; i < rstate->nregs; i++) {
-		radeon_ws_bo_reference(rctx->radeon, &rstate->regs[i].bo, NULL);
+		r600_bo_reference(rctx->radeon, &rstate->regs[i].bo, NULL);
 	}
 	free(rstate);
 }
@@ -738,7 +738,7 @@ static void evergreen_cb(struct r600_pipe_context *rctx, struct r600_pipe_state
 	unsigned color_info;
 	unsigned format, swap, ntype;
 	const struct util_format_description *desc;
-	struct radeon_ws_bo *bo[3];
+	struct r600_bo *bo[3];
 
 	rtex = (struct r600_resource_texture*)state->cbufs[cb]->texture;
 	rbuffer = &rtex->resource;
diff --git a/src/gallium/drivers/r600/r600.h b/src/gallium/drivers/r600/r600.h
index f0b74ad874..dd3c4e3006 100644
--- a/src/gallium/drivers/r600/r600.h
+++ b/src/gallium/drivers/r600/r600.h
@@ -103,15 +103,15 @@ enum radeon_family r600_get_family(struct radeon *rw);
 enum chip_class r600_get_family_class(struct radeon *radeon);
 
 /* lowlevel WS bo */
-struct radeon_ws_bo;
-struct radeon_ws_bo *radeon_ws_bo(struct radeon *radeon,
+struct r600_bo;
+struct r600_bo *r600_bo(struct radeon *radeon,
 				  unsigned size, unsigned alignment, unsigned usage);
-struct radeon_ws_bo *radeon_ws_bo_handle(struct radeon *radeon,
+struct r600_bo *r600_bo_handle(struct radeon *radeon,
 					 unsigned handle);
-void *radeon_ws_bo_map(struct radeon *radeon, struct radeon_ws_bo *bo, unsigned usage, void *ctx);
-void radeon_ws_bo_unmap(struct radeon *radeon, struct radeon_ws_bo *bo);
-void radeon_ws_bo_reference(struct radeon *radeon, struct radeon_ws_bo **dst,
-			    struct radeon_ws_bo *src);
+void *r600_bo_map(struct radeon *radeon, struct r600_bo *bo, unsigned usage, void *ctx);
+void r600_bo_unmap(struct radeon *radeon, struct r600_bo *bo);
+void r600_bo_reference(struct radeon *radeon, struct r600_bo **dst,
+			    struct r600_bo *src);
 
 /* R600/R700 STATES */
 #define R600_GROUP_MAX			16
@@ -122,7 +122,7 @@ struct r600_pipe_reg {
 	u32				offset;
 	u32				mask;
 	u32				value;
-	struct radeon_ws_bo		*bo;
+	struct r600_bo		*bo;
 };
 
 struct r600_pipe_state {
@@ -133,7 +133,7 @@ struct r600_pipe_state {
 
 static inline void r600_pipe_state_add_reg(struct r600_pipe_state *state,
 					u32 offset, u32 value, u32 mask,
-					struct radeon_ws_bo *bo)
+					struct r600_bo *bo)
 {
 	state->regs[state->nregs].offset = offset;
 	state->regs[state->nregs].value = value;
@@ -147,7 +147,7 @@ static inline void r600_pipe_state_add_reg(struct r600_pipe_state *state,
 #define R600_BLOCK_STATUS_DIRTY		(1 << 1)
 
 struct r600_block_reloc {
-	struct radeon_ws_bo	*bo;
+	struct r600_bo	*bo;
 	unsigned		nreloc;
 	unsigned		bo_pm4_index[R600_BLOCK_MAX_BO];
 };
@@ -195,7 +195,7 @@ struct r600_query {
 	/* if we've flushed the query */
 	unsigned				state;
 	/* The buffer where query results are stored. */
-	struct radeon_ws_bo			*buffer;
+	struct r600_bo			*buffer;
 	unsigned				buffer_size;
 	/* linked list of queries */
 	struct list_head			list;
@@ -232,7 +232,7 @@ struct r600_draw {
 	u32			vgt_index_type;
 	u32			vgt_draw_initiator;
 	u32			indices_bo_offset;
-	struct radeon_ws_bo	*indices;
+	struct r600_bo		*indices;
 };
 
 int r600_context_init(struct r600_context *ctx, struct radeon *radeon);
diff --git a/src/gallium/drivers/r600/r600_buffer.c b/src/gallium/drivers/r600/r600_buffer.c
index 1bbcb310eb..2bfa4e22fe 100644
--- a/src/gallium/drivers/r600/r600_buffer.c
+++ b/src/gallium/drivers/r600/r600_buffer.c
@@ -69,7 +69,7 @@ struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
 					 const struct pipe_resource *templ)
 {
 	struct r600_resource_buffer *rbuffer;
-	struct radeon_ws_bo *bo;
+	struct r600_bo *bo;
 	/* XXX We probably want a different alignment for buffers and textures. */
 	unsigned alignment = 4096;
 
@@ -86,7 +86,7 @@ struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
 	rbuffer->r.base.vtbl = &r600_buffer_vtbl;
 	rbuffer->r.size = rbuffer->r.base.b.width0;
 	rbuffer->r.domain = r600_domain_from_usage(rbuffer->r.base.b.bind);
-	bo = radeon_ws_bo((struct radeon*)screen->winsys, rbuffer->r.base.b.width0, alignment, rbuffer->r.base.b.bind);
+	bo = r600_bo((struct radeon*)screen->winsys, rbuffer->r.base.b.width0, alignment, rbuffer->r.base.b.bind);
 	if (bo == NULL) {
 		FREE(rbuffer);
 		return NULL;
@@ -129,7 +129,7 @@ static void r600_buffer_destroy(struct pipe_screen *screen,
 	struct r600_resource_buffer *rbuffer = r600_buffer(buf);
 
 	if (rbuffer->r.bo) {
-		radeon_ws_bo_reference((struct radeon*)screen->winsys, &rbuffer->r.bo, NULL);
+		r600_bo_reference((struct radeon*)screen->winsys, &rbuffer->r.bo, NULL);
 	}
 	FREE(rbuffer);
 }
@@ -153,9 +153,9 @@ static void *r600_buffer_transfer_map(struct pipe_context *pipe,
 				flush = TRUE;
 			
 			if (flush) {
-				radeon_ws_bo_reference((struct radeon*)pipe->winsys, &rbuffer->r.bo, NULL);
+				r600_bo_reference((struct radeon*)pipe->winsys, &rbuffer->r.bo, NULL);
 				rbuffer->num_ranges = 0;
-				rbuffer->r.bo = radeon_ws_bo((struct radeon*)pipe->winsys,
+				rbuffer->r.bo = r600_bo((struct radeon*)pipe->winsys,
 							     rbuffer->r.base.b.width0, 0,
 							     rbuffer->r.base.b.bind);
 				break;
@@ -168,7 +168,7 @@ static void *r600_buffer_transfer_map(struct pipe_context *pipe,
 	if (transfer->usage & PIPE_TRANSFER_WRITE) {
 		write = 1;
 	}
-	data = radeon_ws_bo_map((struct radeon*)pipe->winsys, rbuffer->r.bo, transfer->usage, pipe);
+	data = r600_bo_map((struct radeon*)pipe->winsys, rbuffer->r.bo, transfer->usage, pipe);
 	if (!data)
 		return NULL;
 
@@ -181,7 +181,7 @@ static void r600_buffer_transfer_unmap(struct pipe_context *pipe,
 	struct r600_resource_buffer *rbuffer = r600_buffer(transfer->resource);
 
 	if (rbuffer->r.bo)
-		radeon_ws_bo_unmap((struct radeon*)pipe->winsys, rbuffer->r.bo);
+		r600_bo_unmap((struct radeon*)pipe->winsys, rbuffer->r.bo);
 }
 
 static void r600_buffer_transfer_flush_region(struct pipe_context *pipe,
@@ -225,16 +225,16 @@ struct pipe_resource *r600_buffer_from_handle(struct pipe_screen *screen,
 {
 	struct radeon *rw = (struct radeon*)screen->winsys;
 	struct r600_resource *rbuffer;
-	struct radeon_ws_bo *bo = NULL;
+	struct r600_bo *bo = NULL;
 
-	bo = radeon_ws_bo_handle(rw, whandle->handle);
+	bo = r600_bo_handle(rw, whandle->handle);
 	if (bo == NULL) {
 		return NULL;
 	}
 
 	rbuffer = CALLOC_STRUCT(r600_resource);
 	if (rbuffer == NULL) {
-		radeon_ws_bo_reference(rw, &bo, NULL);
+		r600_bo_reference(rw, &bo, NULL);
 		return NULL;
 	}
 
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index 18ebb0eb22..c46029a561 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -88,7 +88,7 @@ struct r600_vertex_element
 struct r600_pipe_shader {
 	struct r600_shader		shader;
 	struct r600_pipe_state		rstate;
-	struct radeon_ws_bo		*bo;
+	struct r600_bo			*bo;
 	struct r600_vertex_element	vertex_elements;
 };
 
diff --git a/src/gallium/drivers/r600/r600_resource.h b/src/gallium/drivers/r600/r600_resource.h
index ae1ad24bfd..f6377ea802 100644
--- a/src/gallium/drivers/r600/r600_resource.h
+++ b/src/gallium/drivers/r600/r600_resource.h
@@ -41,7 +41,7 @@ struct r600_transfer {
  */
 struct r600_resource {
 	struct u_resource		base;
-	struct radeon_ws_bo		*bo;
+	struct r600_bo			*bo;
 	u32				domain;
 	u32				flink;
 	u32				size;
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 21b9180582..e9d4ee13b9 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -200,13 +200,13 @@ static int r600_pipe_shader(struct pipe_context *ctx, struct r600_pipe_shader *s
 
 	/* copy new shader */
 	if (shader->bo == NULL) {
-		shader->bo = radeon_ws_bo(rctx->radeon, rshader->bc.ndw * 4, 4096, 0);
+		shader->bo = r600_bo(rctx->radeon, rshader->bc.ndw * 4, 4096, 0);
 		if (shader->bo == NULL) {
 			return -ENOMEM;
 		}
-		ptr = radeon_ws_bo_map(rctx->radeon, shader->bo, 0, NULL);
+		ptr = r600_bo_map(rctx->radeon, shader->bo, 0, NULL);
 		memcpy(ptr, rshader->bc.bytecode, rshader->bc.ndw * 4);
-		radeon_ws_bo_unmap(rctx->radeon, shader->bo);
+		r600_bo_unmap(rctx->radeon, shader->bo);
 	}
 	/* build state */
 	rshader->flat_shade = rctx->flatshade;
@@ -254,7 +254,7 @@ static int r600_shader_update(struct pipe_context *ctx, struct r600_pipe_shader
 	for (i = 0; i < rctx->vertex_elements->count; i++) {
 		resource_format[nresources++] = rctx->vertex_elements->elements[i].src_format;
 	}
-	radeon_ws_bo_reference(rctx->radeon, &rshader->bo, NULL);
+	r600_bo_reference(rctx->radeon, &rshader->bo, NULL);
 	LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) {
 		switch (cf->inst) {
 		case V_SQ_CF_WORD1_SQ_CF_INST_VTX:
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 2814ecc239..326e3aa141 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -606,7 +606,7 @@ static struct pipe_sampler_view *r600_create_sampler_view(struct pipe_context *c
 	unsigned format;
 	uint32_t word4 = 0, yuv_format = 0, pitch = 0;
 	unsigned char swizzle[4], array_mode = 0, tile_type = 0;
-	struct radeon_ws_bo *bo[2];
+	struct r600_bo *bo[2];
 
 	if (resource == NULL)
 		return NULL;
@@ -739,7 +739,7 @@ static void r600_delete_state(struct pipe_context *ctx, void *state)
 		rctx->states[rstate->id] = NULL;
 	}
 	for (int i = 0; i < rstate->nregs; i++) {
-		radeon_ws_bo_reference(rctx->radeon, &rstate->regs[i].bo, NULL);
+		r600_bo_reference(rctx->radeon, &rstate->regs[i].bo, NULL);
 	}
 	free(rstate);
 }
@@ -940,7 +940,7 @@ static void r600_cb(struct r600_pipe_context *rctx, struct r600_pipe_state *rsta
 	unsigned color_info;
 	unsigned format, swap, ntype;
 	const struct util_format_description *desc;
-	struct radeon_ws_bo *bo[3];
+	struct r600_bo *bo[3];
 
 	rtex = (struct r600_resource_texture*)state->cbufs[cb]->texture;
 	rbuffer = &rtex->resource;
diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c
index f03d6fcfd6..c46bfa66ba 100644
--- a/src/gallium/drivers/r600/r600_texture.c
+++ b/src/gallium/drivers/r600/r600_texture.c
@@ -127,7 +127,7 @@ struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
 	/* FIXME alignment 4096 enought ? too much ? */
 	resource->domain = r600_domain_from_usage(resource->base.b.bind);
 	resource->size = rtex->size;
-	resource->bo = radeon_ws_bo(radeon, rtex->size, 4096, 0);
+	resource->bo = r600_bo(radeon, rtex->size, 4096, 0);
 	if (resource->bo == NULL) {
 		FREE(rtex);
 		return NULL;
@@ -146,7 +146,7 @@ static void r600_texture_destroy(struct pipe_screen *screen,
 		pipe_resource_reference((struct pipe_resource **)&rtex->flushed_depth_texture, NULL);
 
 	if (resource->bo) {
-		radeon_ws_bo_reference(radeon, &resource->bo, NULL);
+		r600_bo_reference(radeon, &resource->bo, NULL);
 	}
 	FREE(rtex);
 }
@@ -190,7 +190,7 @@ struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen,
 	struct radeon *rw = (struct radeon*)screen->winsys;
 	struct r600_resource_texture *rtex;
 	struct r600_resource *resource;
-	struct radeon_ws_bo *bo = NULL;
+	struct r600_bo *bo = NULL;
 
 	/* Support only 2D textures without mipmaps */
 	if ((templ->target != PIPE_TEXTURE_2D && templ->target != PIPE_TEXTURE_RECT) ||
@@ -201,7 +201,7 @@ struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen,
 	if (rtex == NULL)
 		return NULL;
 
-	bo = radeon_ws_bo_handle(rw, whandle->handle);
+	bo = r600_bo_handle(rw, whandle->handle);
 	if (bo == NULL) {
 		FREE(rtex);
 		return NULL;
@@ -359,7 +359,7 @@ void* r600_texture_transfer_map(struct pipe_context *ctx,
 				struct pipe_transfer* transfer)
 {
 	struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
-	struct radeon_ws_bo *bo;
+	struct r600_bo *bo;
 	enum pipe_format format = transfer->resource->format;
 	struct radeon *radeon = (struct radeon *)ctx->screen->winsys;
 	unsigned long offset = 0;
@@ -379,7 +379,7 @@ void* r600_texture_transfer_map(struct pipe_context *ctx,
 			transfer->box.y / util_format_get_blockheight(format) * transfer->stride +
 			transfer->box.x / util_format_get_blockwidth(format) * util_format_get_blocksize(format);
 	}
-	map = radeon_ws_bo_map(radeon, bo, 0, ctx);
+	map = r600_bo_map(radeon, bo, 0, ctx);
 	if (!map) {
 		return NULL;
 	}
@@ -392,7 +392,7 @@ void r600_texture_transfer_unmap(struct pipe_context *ctx,
 {
 	struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
 	struct radeon *radeon = (struct radeon *)ctx->screen->winsys;
-	struct radeon_ws_bo *bo;
+	struct r600_bo *bo;
 
 	if (rtransfer->linear_texture) {
 		bo = ((struct r600_resource *)rtransfer->linear_texture)->bo;
@@ -405,7 +405,7 @@ void r600_texture_transfer_unmap(struct pipe_context *ctx,
 			bo = ((struct r600_resource *)transfer->resource)->bo;
 		}
 	}
-	radeon_ws_bo_unmap(radeon, bo);
+	r600_bo_unmap(radeon, bo);
 }
 
 struct u_resource_vtbl r600_texture_vtbl =