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authorJakob Bornecrantz <jakob@tungstengraphics.com>2008-06-23 17:57:45 +0200
committerJakob Bornecrantz <jakob@tungstengraphics.com>2008-06-23 18:36:36 +0200
commitf52ab4cc22bfb6708724f3c3966ce734d605cddd (patch)
tree64f70ffa514ac8f66af034243747333698c6548d /src/gallium/drivers
parenta479bf62353b6517841e620122112e7565d2391c (diff)
i915: Add render and texture support for tiled texture and buffers
This is step towards tiled textures and buffer support for i915. But the tiled attribute is never set.
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/i915simple/i915_context.h2
-rw-r--r--src/gallium/drivers/i915simple/i915_state_emit.c12
-rw-r--r--src/gallium/drivers/i915simple/i915_state_sampler.c8
-rw-r--r--src/gallium/drivers/i915simple/i915_texture.c1
4 files changed, 16 insertions, 7 deletions
diff --git a/src/gallium/drivers/i915simple/i915_context.h b/src/gallium/drivers/i915simple/i915_context.h
index 9e02f78714..5d411a6648 100644
--- a/src/gallium/drivers/i915simple/i915_context.h
+++ b/src/gallium/drivers/i915simple/i915_context.h
@@ -192,6 +192,8 @@ struct i915_texture {
unsigned depth_pitch; /* per-image on i945? */
unsigned total_height;
+ unsigned tiled;
+
unsigned nr_images[PIPE_MAX_TEXTURE_LEVELS];
/* Explicitly store the offset of each image for each cube face or
diff --git a/src/gallium/drivers/i915simple/i915_state_emit.c b/src/gallium/drivers/i915simple/i915_state_emit.c
index bc801a82f0..19d968fd8b 100644
--- a/src/gallium/drivers/i915simple/i915_state_emit.c
+++ b/src/gallium/drivers/i915simple/i915_state_emit.c
@@ -213,10 +213,10 @@ i915_emit_hardware_state(struct i915_context *i915 )
if (cbuf_surface) {
unsigned cpitch = (cbuf_surface->pitch * cbuf_surface->cpp);
unsigned ctile = BUF_3D_USE_FENCE;
-#if 0
- if (!((cpitch - 1) & cpitch) && cpitch >= 512)
+ if (cbuf_surface->texture &&
+ ((struct i915_texture*)(cbuf_surface->texture))->tiled) {
ctile = BUF_3D_TILED_SURFACE;
-#endif
+ }
OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
@@ -234,10 +234,10 @@ i915_emit_hardware_state(struct i915_context *i915 )
if (depth_surface) {
unsigned zpitch = (depth_surface->pitch * depth_surface->cpp);
unsigned ztile = BUF_3D_USE_FENCE;
-#if 0
- if (!((zpitch - 1) & zpitch) && zpitch >= 512)
+ if (depth_surface->texture &&
+ ((struct i915_texture*)(depth_surface->texture))->tiled) {
ztile = BUF_3D_TILED_SURFACE;
-#endif
+ }
OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
diff --git a/src/gallium/drivers/i915simple/i915_state_sampler.c b/src/gallium/drivers/i915simple/i915_state_sampler.c
index 24440843f3..379aff3846 100644
--- a/src/gallium/drivers/i915simple/i915_state_sampler.c
+++ b/src/gallium/drivers/i915simple/i915_state_sampler.c
@@ -234,6 +234,7 @@ i915_update_texture(struct i915_context *i915,
const uint width = pt->width[0], height = pt->height[0], depth = pt->depth[0];
const uint num_levels = pt->last_level;
unsigned max_lod = num_levels * 4;
+ unsigned tiled = MS3_USE_FENCE_REGS;
assert(tex);
assert(width);
@@ -246,12 +247,17 @@ i915_update_texture(struct i915_context *i915,
assert(format);
assert(pitch);
+ if (tex->tiled) {
+ assert(!((pitch - 1) & pitch));
+ tiled = MS3_TILED_SURFACE;
+ }
+
/* MS3 state */
state[0] =
(((height - 1) << MS3_HEIGHT_SHIFT)
| ((width - 1) << MS3_WIDTH_SHIFT)
| format
- | MS3_USE_FENCE_REGS);
+ | tiled);
/*
* XXX When min_filter != mag_filter and there's just one mipmap level,
diff --git a/src/gallium/drivers/i915simple/i915_texture.c b/src/gallium/drivers/i915simple/i915_texture.c
index d9b33df1d5..ae107c6676 100644
--- a/src/gallium/drivers/i915simple/i915_texture.c
+++ b/src/gallium/drivers/i915simple/i915_texture.c
@@ -174,6 +174,7 @@ i915_displaytarget_layout(struct i915_texture *tex)
if (tex->base.width[0] >= 128) {
tex->pitch = power_of_two(tex->base.width[0] * pt->cpp) / pt->cpp;
tex->total_height = round_up(tex->base.height[0], 8);
+ tex->tiled = 1;
} else {
tex->pitch = round_up(tex->base.width[0], 64 / pt->cpp);
tex->total_height = tex->base.height[0];