i965g: Formalize on S8Z24 as the suported depth format

4 files changed, 4 insertions, 12 deletions

diff --git a/src/gallium/drivers/i965/brw_misc_state.c b/src/gallium/drivers/i965/brw_misc_state.c
index 4dd73636fd..e4b24229db 100644
--- a/src/gallium/drivers/i965/brw_misc_state.c
+++ b/src/gallium/drivers/i965/brw_misc_state.c
@@ -265,7 +265,8 @@ static int emit_depthbuffer(struct brw_context *brw)
 	 format = BRW_DEPTHFORMAT_D16_UNORM;
 	 cpp = 2;
 	 break;
-      case PIPE_FORMAT_Z24S8_UNORM:
+      case PIPE_FORMAT_X8Z24_UNORM:
+      case PIPE_FORMAT_S8Z24_UNORM:
 	 format = BRW_DEPTHFORMAT_D24_UNORM_S8_UINT;
 	 cpp = 4;
 	 break;
diff --git a/src/gallium/drivers/i965/brw_pipe_clear.c b/src/gallium/drivers/i965/brw_pipe_clear.c
index 34cad62977..f846b4342c 100644
--- a/src/gallium/drivers/i965/brw_pipe_clear.c
+++ b/src/gallium/drivers/i965/brw_pipe_clear.c
@@ -135,8 +135,6 @@ static void zstencil_clear(struct brw_context *brw,
    unsigned value;
 
    switch (bsurface->base.format) {
-   case PIPE_FORMAT_Z24S8_UNORM:
-   case PIPE_FORMAT_Z24X8_UNORM:
    case PIPE_FORMAT_X8Z24_UNORM:
    case PIPE_FORMAT_S8Z24_UNORM:
       value = ((unsigned)(depth * MASK24) & MASK24);
@@ -150,11 +148,6 @@ static void zstencil_clear(struct brw_context *brw,
    }
 
    switch (bsurface->base.format) {
-   case PIPE_FORMAT_Z24S8_UNORM:
-   case PIPE_FORMAT_Z24X8_UNORM:
-      value = (value << 8) | stencil;
-      break;
-
    case PIPE_FORMAT_X8Z24_UNORM:
    case PIPE_FORMAT_S8Z24_UNORM:
       value = value | (stencil << 24);
diff --git a/src/gallium/drivers/i965/brw_screen.c b/src/gallium/drivers/i965/brw_screen.c
index 575a418b7d..af885320a7 100644
--- a/src/gallium/drivers/i965/brw_screen.c
+++ b/src/gallium/drivers/i965/brw_screen.c
@@ -210,12 +210,14 @@ brw_is_format_supported(struct pipe_screen *screen,
       PIPE_FORMAT_A8L8_UNORM,
       PIPE_FORMAT_YCBCR,
       PIPE_FORMAT_YCBCR_REV,
+      PIPE_FORMAT_X8Z24_UNORM,
       PIPE_FORMAT_S8Z24_UNORM,
       PIPE_FORMAT_NONE  /* list terminator */
    };
    static const enum pipe_format surface_supported[] = {
       PIPE_FORMAT_A8R8G8B8_UNORM,
       PIPE_FORMAT_R5G6B5_UNORM,
+      PIPE_FORMAT_X8Z24_UNORM,
       PIPE_FORMAT_S8Z24_UNORM,
       PIPE_FORMAT_NONE  /* list terminator */
    };
diff --git a/src/gallium/drivers/i965/brw_screen_texture.c b/src/gallium/drivers/i965/brw_screen_texture.c
index 75bb8a73b7..9ca60b46d3 100644
--- a/src/gallium/drivers/i965/brw_screen_texture.c
+++ b/src/gallium/drivers/i965/brw_screen_texture.c
@@ -142,12 +142,8 @@ static GLuint translate_tex_format( enum pipe_format pf )
    case PIPE_FORMAT_DXT1_SRGB:
       return BRW_SURFACEFORMAT_BC1_UNORM_SRGB;
 
-      /* XXX: which pipe depth formats does i965 suppport
-       */
    case PIPE_FORMAT_S8Z24_UNORM:
    case PIPE_FORMAT_X8Z24_UNORM:
-   case PIPE_FORMAT_Z24S8_UNORM:
-   case PIPE_FORMAT_Z24X8_UNORM:
          return BRW_SURFACEFORMAT_I24X8_UNORM;
 
 #if 0