diff options
author | Jerome Glisse <jglisse@redhat.com> | 2010-12-09 13:07:10 -0500 |
---|---|---|
committer | Jerome Glisse <jglisse@redhat.com> | 2010-12-09 16:07:01 -0500 |
commit | 15753cf54d57b1ebb0cd41b7dbb8030d23213891 (patch) | |
tree | fc98d4875b6a006f14d2c36acfc702178131c70c /src/gallium/winsys/r600/drm/r600_hw_context.c | |
parent | ef534f3838f23d757a40426728789183ed36c3bb (diff) |
r600g: avoid using pb* helper we are loosing previous cpu cycle with it
r600g is up to a point where all small CPU cycle matter and pb* turn
high on profile. It's mostly because pb try to be generic and thus
trigger unecessary check for r600g driver. To avoid having too much
abstraction & too much depth in the call embedded everythings into
r600_bo. Make code simpler & faster. The performance win highly depend
on the CPU & application considered being more important on slower CPU
and marginal/unoticeable on faster one.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Diffstat (limited to 'src/gallium/winsys/r600/drm/r600_hw_context.c')
-rw-r--r-- | src/gallium/winsys/r600/drm/r600_hw_context.c | 19 |
1 files changed, 12 insertions, 7 deletions
diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c index 0f2724f61c..d01ec3ee9b 100644 --- a/src/gallium/winsys/r600/drm/r600_hw_context.c +++ b/src/gallium/winsys/r600/drm/r600_hw_context.c @@ -28,16 +28,15 @@ #include <string.h> #include <stdlib.h> #include <assert.h> +#include <pipe/p_compiler.h> +#include <util/u_inlines.h> +#include <util/u_memory.h> +#include <pipebuffer/pb_bufmgr.h> #include "xf86drm.h" -#include "r600.h" -#include "r600d.h" #include "radeon_drm.h" -#include "bof.h" -#include "pipe/p_compiler.h" -#include "util/u_inlines.h" -#include "util/u_memory.h" -#include <pipebuffer/pb_bufmgr.h> #include "r600_priv.h" +#include "bof.h" +#include "r600d.h" #define GROUP_FORCE_NEW_BLOCK 0 @@ -50,6 +49,7 @@ int r600_context_init_fence(struct r600_context *ctx) } ctx->cfence = r600_bo_map(ctx->radeon, ctx->fence_bo, PB_USAGE_UNSYNCHRONIZED, NULL); *ctx->cfence = 0; + ctx->radeon->cfence = ctx->cfence; LIST_INITHEAD(&ctx->fenced_bo); return 0; } @@ -814,6 +814,7 @@ void r600_context_bo_reloc(struct r600_context *ctx, u32 *pm4, struct r600_bo *r ctx->reloc[ctx->creloc].write_domain = rbo->domains & (RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM); ctx->reloc[ctx->creloc].flags = 0; radeon_bo_reference(ctx->radeon, &ctx->bo[ctx->creloc], bo); + rbo->fence = ctx->fence; ctx->creloc++; /* set PKT3 to point to proper reloc */ *pm4 = bo->reloc_id; @@ -836,6 +837,7 @@ void r600_context_pipe_state_set(struct r600_context *ctx, struct r600_pipe_stat /* find relocation */ id = block->pm4_bo_index[id]; r600_bo_reference(ctx->radeon, &block->reloc[id].bo, state->regs[i].bo); + state->regs[i].bo->fence = ctx->fence; } if (!(block->status & R600_BLOCK_STATUS_DIRTY)) { block->status |= R600_BLOCK_STATUS_ENABLED; @@ -875,10 +877,13 @@ static inline void r600_context_pipe_state_set_resource(struct r600_context *ctx */ r600_bo_reference(ctx->radeon, &block->reloc[1].bo, state->regs[0].bo); r600_bo_reference(ctx->radeon, &block->reloc[2].bo, state->regs[0].bo); + state->regs[0].bo->fence = ctx->fence; } else { /* TEXTURE RESOURCE */ r600_bo_reference(ctx->radeon, &block->reloc[1].bo, state->regs[2].bo); r600_bo_reference(ctx->radeon, &block->reloc[2].bo, state->regs[3].bo); + state->regs[2].bo->fence = ctx->fence; + state->regs[3].bo->fence = ctx->fence; } if (!(block->status & R600_BLOCK_STATUS_DIRTY)) { block->status |= R600_BLOCK_STATUS_ENABLED; |