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authorKeith Whitwell <keithw@vmware.com>2010-03-09 19:14:34 +0100
committerMichal Krol <michal@vmware.com>2010-03-09 20:49:05 +0100
commitdc1e4cf87fdab5a57049fbf4180e3597d80323cd (patch)
tree9194d4082b924fc80d557a4b670a224cf59f374d /src/gallium
parenta673dee4553b6f1649d4cc31f7f7849058411c49 (diff)
svga: Don't do culling while the software pipeline is active.
It does it for us, and additionally introduces potentially back-facing triangles.
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/svga/svga_state_rss.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/src/gallium/drivers/svga/svga_state_rss.c b/src/gallium/drivers/svga/svga_state_rss.c
index 107cc403b4..b7195d246b 100644
--- a/src/gallium/drivers/svga/svga_state_rss.c
+++ b/src/gallium/drivers/svga/svga_state_rss.c
@@ -191,15 +191,24 @@ static int emit_rss( struct svga_context *svga,
EMIT_RS( svga, svga->curr.stencil_ref.ref_value[0], STENCILREF, fail );
}
- if (dirty & SVGA_NEW_RAST)
+ if (dirty & (SVGA_NEW_RAST | SVGA_NEW_NEED_PIPELINE))
{
const struct svga_rasterizer_state *curr = svga->curr.rast;
+ unsigned cullmode = curr->cullmode;
/* Shademode: still need to rearrange index list to move
* flat-shading PV first vertex.
*/
EMIT_RS( svga, curr->shademode, SHADEMODE, fail );
- EMIT_RS( svga, curr->cullmode, CULLMODE, fail );
+
+ /* Don't do culling while the software pipeline is active. It
+ * does it for us, and additionally introduces potentially
+ * back-facing triangles.
+ */
+ if (svga->state.sw.need_pipeline)
+ cullmode = SVGA3D_FACE_NONE;
+
+ EMIT_RS( svga, cullmode, CULLMODE, fail );
EMIT_RS( svga, curr->scissortestenable, SCISSORTESTENABLE, fail );
EMIT_RS( svga, curr->multisampleantialias, MULTISAMPLEANTIALIAS, fail );
EMIT_RS( svga, curr->lastpixel, LASTPIXEL, fail );