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authorChad Versace <chad.versace@intel.com>2010-10-15 12:08:28 -0700
committerIan Romanick <ian.d.romanick@intel.com>2010-10-19 13:17:33 -0700
commitd03ac0f8d81fd3032d271586d936f14b7d9201d5 (patch)
treeaeb5b1b592768bf18cf4be5552021798dbbdcfe7 /src/glsl/ast_to_hir.cpp
parentcfdbf8bc8497b29fbdd9fa7bd00da554aecb5962 (diff)
glsl: Implement ast-to-hir for bit-logic ops
Implement by adding to ast_expression::hir() the following cases: - ast_and_assign - ast_or_assign - ast_xor_assign
Diffstat (limited to 'src/glsl/ast_to_hir.cpp')
-rw-r--r--src/glsl/ast_to_hir.cpp16
1 files changed, 12 insertions, 4 deletions
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 18bfc2970d..f5ea6613ce 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -1197,11 +1197,19 @@ ast_expression::hir(exec_list *instructions,
case ast_and_assign:
case ast_xor_assign:
- case ast_or_assign:
- _mesa_glsl_error(& loc, state,
- "FINISHME: implement logic assignment operators");
- error_emitted = true;
+ case ast_or_assign: {
+ op[0] = this->subexpressions[0]->hir(instructions, state);
+ op[1] = this->subexpressions[1]->hir(instructions, state);
+ type = bit_logic_result_type(op[0]->type, op[1]->type, this->oper,
+ state, &loc);
+ ir_rvalue *temp_rhs = new(ctx) ir_expression(operations[this->oper],
+ type, op[0], op[1]);
+ result = do_assignment(instructions, state, op[0]->clone(ctx, NULL),
+ temp_rhs,
+ this->subexpressions[0]->get_location());
+ error_emitted = op[0]->type->is_error() || op[1]->type->is_error();
break;
+ }
case ast_conditional: {
op[0] = this->subexpressions[0]->hir(instructions, state);