diff options
| author | Eric Anholt <eric@anholt.net> | 2009-06-04 10:21:29 +0000 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2009-06-04 10:34:52 +0000 |
| commit | 165ae5e2fb57bdb64b4cf01271b4effeb811f675 (patch) | |
| tree | ec87bebf0363e14a9eedfed93a019c7dee91fa86 /src/mesa/drivers/dri/i915/i915_texstate.c | |
| parent | 1b6f7fb7d5a9756c97e2ac2f5390b0d2333acf55 (diff) | |
i915: Don't rely on fence regs when we don't have to.
We're on the way to telling the kernel about when we need fence regs on our
objects or not, and this will cut the number of places needing them.
Diffstat (limited to 'src/mesa/drivers/dri/i915/i915_texstate.c')
| -rw-r--r-- | src/mesa/drivers/dri/i915/i915_texstate.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c index a37dd7f4fb..32d4b30cf9 100644 --- a/src/mesa/drivers/dri/i915/i915_texstate.c +++ b/src/mesa/drivers/dri/i915/i915_texstate.c @@ -185,8 +185,13 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) state[I915_TEXREG_MS3] = (((firstImage->Height - 1) << MS3_HEIGHT_SHIFT) | - ((firstImage->Width - 1) << MS3_WIDTH_SHIFT) | format | - MS3_USE_FENCE_REGS); + ((firstImage->Width - 1) << MS3_WIDTH_SHIFT) | format); + + if (intelObj->mt->region->tiling != I915_TILING_NONE) { + state[I915_TEXREG_MS3] |= MS3_TILED_SURFACE; + if (intelObj->mt->region->tiling == I915_TILING_Y) + state[I915_TEXREG_MS3] |= MS3_TILE_WALK; + } state[I915_TEXREG_MS4] = ((((pitch / 4) - 1) << MS4_PITCH_SHIFT) | MS4_CUBE_FACE_ENA_MASK | |