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authorBrian Paul <brian.paul@tungstengraphics.com>2005-05-04 20:11:35 +0000
committerBrian Paul <brian.paul@tungstengraphics.com>2005-05-04 20:11:35 +0000
commite4b2356c07d31fbeeabb13b2fb47db703b473080 (patch)
treed8b7f1c7c9e7c84d84349485f942dd205dd4c16d /src/mesa/drivers/dri/i915/intel_ioctl.c
parentebef61f5c0950572f9c6a81b08f447957461675c (diff)
Major check-in of changes for GL_EXT_framebuffer_object extension.
Main driver impacts: - new code for creating the Mesa GLframebuffer - new span/pixel read/write code Some drivers not yet updated/tested.
Diffstat (limited to 'src/mesa/drivers/dri/i915/intel_ioctl.c')
-rw-r--r--src/mesa/drivers/dri/i915/intel_ioctl.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/src/mesa/drivers/dri/i915/intel_ioctl.c b/src/mesa/drivers/dri/i915/intel_ioctl.c
index 3662918dd8..9691627ebc 100644
--- a/src/mesa/drivers/dri/i915/intel_ioctl.c
+++ b/src/mesa/drivers/dri/i915/intel_ioctl.c
@@ -348,41 +348,41 @@ void intelClear(GLcontext *ctx, GLbitfield mask, GLboolean all,
*/
intelFlush( &intel->ctx );
- if (mask & DD_FRONT_LEFT_BIT) {
+ if (mask & BUFFER_BIT_FRONT_LEFT) {
if (colorMask == ~0) {
- blit_mask |= DD_FRONT_LEFT_BIT;
+ blit_mask |= BUFFER_BIT_FRONT_LEFT;
}
else {
- tri_mask |= DD_FRONT_LEFT_BIT;
+ tri_mask |= BUFFER_BIT_FRONT_LEFT;
}
}
- if (mask & DD_BACK_LEFT_BIT) {
+ if (mask & BUFFER_BIT_BACK_LEFT) {
if (colorMask == ~0) {
- blit_mask |= DD_BACK_LEFT_BIT;
+ blit_mask |= BUFFER_BIT_BACK_LEFT;
}
else {
- tri_mask |= DD_BACK_LEFT_BIT;
+ tri_mask |= BUFFER_BIT_BACK_LEFT;
}
}
- if (mask & DD_DEPTH_BIT) {
- blit_mask |= DD_DEPTH_BIT;
+ if (mask & BUFFER_BIT_DEPTH) {
+ blit_mask |= BUFFER_BIT_DEPTH;
}
- if (mask & DD_STENCIL_BIT) {
+ if (mask & BUFFER_BIT_STENCIL) {
if (!intel->hw_stencil) {
- swrast_mask |= DD_STENCIL_BIT;
+ swrast_mask |= BUFFER_BIT_STENCIL;
}
else if (ctx->Stencil.WriteMask[0] != 0xff) {
- tri_mask |= DD_STENCIL_BIT;
+ tri_mask |= BUFFER_BIT_STENCIL;
}
else {
- blit_mask |= DD_STENCIL_BIT;
+ blit_mask |= BUFFER_BIT_STENCIL;
}
}
- swrast_mask |= (mask & DD_ACCUM_BIT);
+ swrast_mask |= (mask & BUFFER_BIT_ACCUM);
if (blit_mask)
intelClearWithBlit( ctx, blit_mask, all, cx, cy, cw, ch );