diff options
| author | Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> | 2007-04-17 15:21:54 +0200 |
|---|---|---|
| committer | Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> | 2007-04-17 15:21:54 +0200 |
| commit | 1a9483c95492bee3fbda131181945b6c878bf52f (patch) | |
| tree | d7ba75969a29fb94520128f1ce5ffe4716ec5942 /src/mesa/drivers/dri/i915tex/intel_context.c | |
| parent | 36949abec763e56a5356b65e2f2570cfed11d853 (diff) | |
Defer buffer pool creation to the first context creation.
This way we have a hw context so that we can take the hardware lock.
Also, at this point, AIGLX isn't locked with the X server context as it is
at screen creation.
Diffstat (limited to 'src/mesa/drivers/dri/i915tex/intel_context.c')
| -rw-r--r-- | src/mesa/drivers/dri/i915tex/intel_context.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i915tex/intel_context.c b/src/mesa/drivers/dri/i915tex/intel_context.c index c6c66e26ca..20b2b41ef2 100644 --- a/src/mesa/drivers/dri/i915tex/intel_context.c +++ b/src/mesa/drivers/dri/i915tex/intel_context.c @@ -346,7 +346,15 @@ intelInitContext(struct intel_context *intel, drmI830Sarea *saPriv = (drmI830Sarea *) (((GLubyte *) sPriv->pSAREA) + intelScreen->sarea_priv_offset); int fthrottle_mode; + GLboolean havePools; + DRM_LIGHT_LOCK(sPriv->fd, &sPriv->pSAREA->lock, driContextPriv->hHWContext); + havePools = intelCreatePools(intelScreen); + DRM_UNLOCK(sPriv->fd, &sPriv->pSAREA->lock, driContextPriv->hHWContext); + + if (!havePools) + return GL_FALSE; + if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx, functions, (void *) intel)) |