Merge branch 'master' into crestline

Conflicts:

	src/mesa/drivers/dri/i965/brw_tex_layout.c

Michel Dänzer replaced the copy of the 945 mipmap layout code with that from
the 945 driver directly.

7 files changed, 32 insertions, 67 deletions

diff --git a/src/mesa/drivers/dri/i915tex/Makefile b/src/mesa/drivers/dri/i915tex/Makefile
index 94879d209f..3b3f3f5a3f 100644
--- a/src/mesa/drivers/dri/i915tex/Makefile
+++ b/src/mesa/drivers/dri/i915tex/Makefile
@@ -20,6 +20,7 @@ DRIVER_SOURCES = \
 	intel_batchbuffer.c \
 	intel_mipmap_tree.c \
 	i915_tex_layout.c \
+	intel_tex_layout.c \
 	intel_tex_image.c \
 	intel_tex_subimage.c \
 	intel_tex_copy.c \
@@ -59,8 +60,10 @@ C_SOURCES = \
 
 ASM_SOURCES = 
 
-
+DRIVER_DEFINES = -I../intel
 
 include ../Makefile.template
 
+intel_tex_layout.o: ../intel/intel_tex_layout.c
+
 symlinks:
diff --git a/src/mesa/drivers/dri/i915tex/i915_tex_layout.c b/src/mesa/drivers/dri/i915tex/i915_tex_layout.c
index e9360ecea8..333fefef85 100644
--- a/src/mesa/drivers/dri/i915tex/i915_tex_layout.c
+++ b/src/mesa/drivers/dri/i915tex/i915_tex_layout.c
@@ -30,6 +30,7 @@
  */
 
 #include "intel_mipmap_tree.h"
+#include "intel_tex_layout.h"
 #include "macros.h"
 #include "intel_context.h"
 
@@ -52,12 +53,6 @@ static GLint step_offsets[6][2] = { {0, 2},
 {-1, 1}
 };
 
-static GLuint
-minify(GLuint d)
-{
-   return MAX2(1, d >> 1);
-}
-
 GLboolean
 i915_miptree_layout(struct intel_mipmap_tree * mt)
 {
@@ -217,7 +212,7 @@ i945_miptree_layout(struct intel_mipmap_tree * mt)
                y = mt->total_height - 4;
                x = (face - 4) * 8;
             }
-            else if (dim < 4) {
+            else if (dim < 4 && (face > 0 || mt->first_level > 0)) {
                y = mt->total_height - 4;
                x = face * 8;
             }
@@ -322,52 +317,9 @@ i945_miptree_layout(struct intel_mipmap_tree * mt)
 
    case GL_TEXTURE_1D:
    case GL_TEXTURE_2D:
-   case GL_TEXTURE_RECTANGLE_ARB:{
-         GLuint x = 0;
-         GLuint y = 0;
-         GLuint width = mt->width0;
-         GLuint height = mt->height0;
-	 GLint align_h = 2;
-
-         mt->pitch = ((mt->width0 * mt->cpp + 3) & ~3) / mt->cpp;
-         mt->total_height = 0;
-
-         for (level = mt->first_level; level <= mt->last_level; level++) {
-	    GLuint img_height;
-
-            intel_miptree_set_level_info(mt, level, 1,
-                                         x, y, 
-					 width, 
-					 mt->compressed ? height/4 : height, 1);
-
-
-	    if (mt->compressed)
-               img_height = MAX2(1, height / 4);
-            else
-               img_height = MAX2(align_h, height);
-
-            /* LPT change: step right after second mipmap.
-             */
-            if (level == mt->first_level + 1) {
-               x += mt->pitch / 2;
-	       x = (x + 3) & ~3;
-	    }
-            else {
-	       y += img_height;
-	       y += align_h - 1;
-	       y &= ~(align_h - 1);
-	    }
-
-            /* Because the images are packed better, the final offset
-             * might not be the maximal one:
-             */
-            mt->total_height = MAX2(mt->total_height, y);
-
-            width = minify(width);
-            height = minify(height);
-         }
+   case GL_TEXTURE_RECTANGLE_ARB:
+         i945_miptree_layout_2d(mt);
          break;
-      }
    default:
       _mesa_problem(NULL, "Unexpected tex target in i945_miptree_layout()");
    }
diff --git a/src/mesa/drivers/dri/i915tex/intel_batchbuffer.c b/src/mesa/drivers/dri/i915tex/intel_batchbuffer.c
index b4e0b74f16..be2750d041 100644
--- a/src/mesa/drivers/dri/i915tex/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i915tex/intel_batchbuffer.c
@@ -252,6 +252,7 @@ intel_batchbuffer_flush(struct intel_batchbuffer *batch)
 {
    struct intel_context *intel = batch->intel;
    GLuint used = batch->ptr - batch->map;
+   GLboolean was_locked = intel->locked;
 
    if (used == 0)
       return batch->last_fence;
@@ -278,17 +279,14 @@ intel_batchbuffer_flush(struct intel_batchbuffer *batch)
    /* TODO: Just pass the relocation list and dma buffer up to the
     * kernel.
     */
-   if (!intel->locked) {
-      assert(!(batch->flags & INTEL_BATCH_NO_CLIPRECTS));
-
+   if (!was_locked)
       LOCK_HARDWARE(intel);
-      do_flush_locked(batch, used, GL_FALSE, GL_TRUE);
+
+   do_flush_locked(batch, used, !(batch->flags & INTEL_BATCH_CLIPRECTS),
+		   GL_FALSE);
+
+   if (!was_locked)
       UNLOCK_HARDWARE(intel);
-   }
-   else {
-      GLboolean ignore_cliprects = !(batch->flags & INTEL_BATCH_CLIPRECTS);
-      do_flush_locked(batch, used, ignore_cliprects, GL_FALSE);
-   }
 
    /* Reset the buffer:
     */
diff --git a/src/mesa/drivers/dri/i915tex/intel_screen.c b/src/mesa/drivers/dri/i915tex/intel_screen.c
index 9bbfabbb8c..efa1b014a6 100644
--- a/src/mesa/drivers/dri/i915tex/intel_screen.c
+++ b/src/mesa/drivers/dri/i915tex/intel_screen.c
@@ -737,6 +737,9 @@ intelFillInModes(unsigned pixel_bits, unsigned depth_bits,
     */
    stencil_bits_array[0] = 0;
    stencil_bits_array[1] = 0;
+   if (depth_bits == 24)
+      stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
+
    stencil_bits_array[2] = (stencil_bits == 0) ? 8 : stencil_bits;
 
    depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 3 : 1;
diff --git a/src/mesa/drivers/dri/i915tex/intel_tex_layout.c b/src/mesa/drivers/dri/i915tex/intel_tex_layout.c
new file mode 120000
index 0000000000..fe61b44194
--- /dev/null
+++ b/src/mesa/drivers/dri/i915tex/intel_tex_layout.c
@@ -0,0 +1 @@
+../intel/intel_tex_layout.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915tex/intel_tex_subimage.c b/src/mesa/drivers/dri/i915tex/intel_tex_subimage.c
index 25a2dca685..3935787806 100644
--- a/src/mesa/drivers/dri/i915tex/intel_tex_subimage.c
+++ b/src/mesa/drivers/dri/i915tex/intel_tex_subimage.c
@@ -50,7 +50,6 @@ intelTexSubimage(GLcontext * ctx,
 {
    struct intel_context *intel = intel_context(ctx);
    struct intel_texture_image *intelImage = intel_texture_image(texImage);
-   GLuint dstImageStride;
    GLuint dstRowStride;
 
    DBG("%s target %s level %d offset %d,%d %dx%d\n", __FUNCTION__,
@@ -79,7 +78,7 @@ intelTexSubimage(GLcontext * ctx,
                                                intelImage->face,
                                                intelImage->level,
                                                &dstRowStride,
-                                               &dstImageStride);
+                                               texImage->ImageOffsets);
 
    assert(dstRowStride);
 
diff --git a/src/mesa/drivers/dri/i915tex/intel_tex_validate.c b/src/mesa/drivers/dri/i915tex/intel_tex_validate.c
index 5f82dfa19e..e73c9c2f21 100644
--- a/src/mesa/drivers/dri/i915tex/intel_tex_validate.c
+++ b/src/mesa/drivers/dri/i915tex/intel_tex_validate.c
@@ -2,6 +2,7 @@
 #include "macros.h"
 
 #include "intel_context.h"
+#include "intel_batchbuffer.h"
 #include "intel_mipmap_tree.h"
 #include "intel_tex.h"
 
@@ -155,9 +156,15 @@ intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit)
     * leaving the tree alone.
     */
    if (intelObj->mt &&
-       ((intelObj->mt->first_level > intelObj->firstLevel) ||
-        (intelObj->mt->last_level < intelObj->lastLevel) ||
-        (intelObj->mt->internal_format != firstImage->base.InternalFormat))) {
+       (intelObj->mt->target != intelObj->base.Target ||
+	intelObj->mt->internal_format != firstImage->base.InternalFormat ||
+	intelObj->mt->first_level != intelObj->firstLevel ||
+	intelObj->mt->last_level != intelObj->lastLevel ||
+	intelObj->mt->width0 != firstImage->base.Width ||
+	intelObj->mt->height0 != firstImage->base.Height ||
+	intelObj->mt->depth0 != firstImage->base.Depth ||
+	intelObj->mt->cpp != firstImage->base.TexFormat->TexelBytes ||
+	intelObj->mt->compressed != firstImage->base.IsCompressed)) {
       intel_miptree_release(intel, &intelObj->mt);
    }
 
@@ -198,6 +205,8 @@ intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit)
       }
    }
 
+   intel_batchbuffer_flush(intel->batch);
+
    return GL_TRUE;
 }