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authorIan Romanick <ian.d.romanick@intel.com>2009-11-17 16:10:24 -0800
committerIan Romanick <ian.d.romanick@intel.com>2009-11-17 16:25:38 -0800
commit5606dfb572bf4b89b4882265924705bacc8c182b (patch)
treef168c4f81f99fbe5741e6b10b958e0939f444397 /src/mesa/drivers/dri/i965/brw_clip.c
parentb43887cf7e64cc44cf1409f910d1324549b265d2 (diff)
Merge branch 'outputswritten64'
Add a GLbitfield64 type and several macros to operate on 64-bit fields. The OutputsWritten field of gl_program is changed to use that type. This results in a fair amount of fallout in drivers that use programs. No changes are strictly necessary at this point as all bits used are below the 32-bit boundary. Fairly soon several bits will be added for clip distances written by a vertex shader. This will cause several bits used for varyings to be pushed above the 32-bit boundary. This will affect any drivers that support GLSL. At this point, only the i965 driver has been modified to support this eventuality. I did this as a "squash" merge. There were several places through the outputswritten64 branch where things were broken. I foresee this causing difficulties later for bisecting. The history is still available in the branch. Conflicts: src/mesa/drivers/dri/i965/brw_wm.h
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_clip.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_clip.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c
index f45dcf8282..dbd10a5297 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.c
+++ b/src/mesa/drivers/dri/i965/brw_clip.c
@@ -78,7 +78,7 @@ static void compile_clip_prog( struct brw_context *brw,
delta = REG_SIZE;
for (i = 0; i < VERT_RESULT_MAX; i++)
- if (c.key.attrs & (1<<i)) {
+ if (c.key.attrs & BITFIELD64_BIT(i)) {
c.offset[i] = delta;
delta += ATTR_SIZE;
}