diff options
author | Xiang, Haihao <haihao.xiang@intel.com> | 2008-01-29 11:13:53 +0800 |
---|---|---|
committer | Xiang, Haihao <haihao.xiang@intel.com> | 2008-01-29 11:13:53 +0800 |
commit | 8e444fb9e2685e3eac42beb848b08e91dc20c88a (patch) | |
tree | 66b9374213269fdf45de01ec08caf131b5f27fb8 /src/mesa/drivers/dri/i965/brw_clip_tri.c | |
parent | f09b2382e9a2c8f4302e644ea8c9cb7c933457a1 (diff) |
i965: new integrated graphics chipset support
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_clip_tri.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_clip_tri.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c b/src/mesa/drivers/dri/i965/brw_clip_tri.c index 316dab8070..f1fc6e1e9d 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_tri.c +++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c @@ -536,15 +536,16 @@ void brw_emit_tri_clip( struct brw_clip_compile *c ) /* if -ve rhw workaround bit is set, do cliptest */ - brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ); - brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2), - brw_imm_ud(1<<20)); - neg_rhw = brw_IF(p, BRW_EXECUTE_1); - { - brw_clip_test(c); + if (!BRW_IS_IGD(p->brw)) { + brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ); + brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2), + brw_imm_ud(1<<20)); + neg_rhw = brw_IF(p, BRW_EXECUTE_1); + { + brw_clip_test(c); + } + brw_ENDIF(p, neg_rhw); } - brw_ENDIF(p, neg_rhw); - /* Can't push into do_clip_tri because with polygon (or quad) * flatshading, need to apply the flatshade here because we don't * respect the PV when converting to trifan for emit: |