summaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri/i965/brw_context.c
diff options
context:
space:
mode:
authorRoland Scheidegger <sroland@vmware.com>2009-04-22 17:37:18 +0200
committerRoland Scheidegger <sroland@vmware.com>2009-04-22 17:38:06 +0200
commit50853be894aa3edd1e9271f7d625f319209e340f (patch)
tree9ec361fae781d3968f436e075326df73752f2a52 /src/mesa/drivers/dri/i965/brw_context.c
parent7843243deedd66b0c94c8874e732ed7e8c6617ff (diff)
intel: fix max anisotropy supported
i915 actually supports up to 4 (according to header file - not tested), i965 up to 16 (code already handled this but slightly broken), so don't use 2 for all chips, even though angular dependency is very high.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_context.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index d96ff29310..4dbe551d83 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -118,6 +118,8 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis,
ctx->Const.MaxCubeTextureLevels = 12;
ctx->Const.MaxTextureRectSize = (1<<12);
+ ctx->Const.MaxTextureMaxAnisotropy = 16.0;
+
/* if conformance mode is set, swrast can handle any size AA point */
ctx->Const.MaxPointSizeAA = 255.0;