diff options
author | Eric Anholt <eric@anholt.net> | 2010-06-10 23:45:51 -0700 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2010-06-11 00:15:59 -0700 |
commit | 178414eba402f9087ea505e7ef19f1becdd7a36d (patch) | |
tree | dc5d5e33be05ec830d971bc4129226fbb0d26cf5 /src/mesa/drivers/dri/i965/brw_context.h | |
parent | 73de09f265cb1c66d70fd9eb92021882bfbbbef6 (diff) |
i965: Remove caching of surface state objects.
It turns out that computing a 56 byte key to look up a 20-byte object
out of a hash table was some sort of a bad idea. Whoops.
before:
[ # ] backend test min(s) median(s) stddev. count
[ 0] gl firefox-talos-gfx 37.799 38.203 0.39% 6/6
after:
[ 0] gl firefox-talos-gfx 34.761 34.784 0.17% 5/6
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_context.h')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.h | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 86b86fde9a..7fbffbeb03 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -302,7 +302,6 @@ enum brw_cache_id { BRW_CLIP_VP, BRW_CLIP_UNIT, BRW_CLIP_PROG, - BRW_SS_SURFACE, BRW_MAX_CACHE }; @@ -376,7 +375,6 @@ struct brw_tracked_state { #define CACHE_NEW_CLIP_VP (1<<BRW_CLIP_VP) #define CACHE_NEW_CLIP_UNIT (1<<BRW_CLIP_UNIT) #define CACHE_NEW_CLIP_PROG (1<<BRW_CLIP_PROG) -#define CACHE_NEW_SURFACE (1<<BRW_SS_SURFACE) struct brw_cached_batch_item { struct header *header; @@ -463,8 +461,7 @@ struct brw_context int validated_bo_count; } state; - struct brw_cache cache; /** non-surface items */ - struct brw_cache surface_cache; /* surface items */ + struct brw_cache cache; struct brw_cached_batch_item *cached_batch_items; struct { @@ -599,6 +596,7 @@ struct brw_context drm_intel_bo *bind_bo; uint32_t bind_bo_offset; drm_intel_bo *surf_bo[BRW_VS_MAX_SURF]; + uint32_t surf_offset[BRW_VS_MAX_SURF]; GLuint nr_surfaces; } vs; @@ -652,6 +650,7 @@ struct brw_context drm_intel_bo *bind_bo; uint32_t bind_bo_offset; drm_intel_bo *surf_bo[BRW_WM_MAX_SURF]; + uint32_t surf_offset[BRW_WM_MAX_SURF]; drm_intel_bo *prog_bo; drm_intel_bo *state_bo; |