diff options
| author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-08-20 14:37:19 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-08-20 16:17:39 -0700 |
| commit | 93ba0055c325007656c14ba38302e21be3dc599f (patch) | |
| tree | 31fba7f6e423a3cbeb315c31e54a47c86488817d /src/mesa/drivers/dri/i965/brw_disasm.c | |
| parent | ffb5095d56c0f58a35e12d40bb4ffc869e4071bd (diff) | |
i965: Add AccWrCtl support on Sandybridge.
Whenever the accumulator results are needed, this bit must be set.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_disasm.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_disasm.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c index 5e5db3264b..b54638058b 100644 --- a/src/mesa/drivers/dri/i965/brw_disasm.c +++ b/src/mesa/drivers/dri/i965/brw_disasm.c @@ -159,6 +159,11 @@ char *saturate[2] = { [1] = ".sat" }; +char *accwr[2] = { + [0] = "", + [1] = "AccWrEnable" +}; + char *exec_size[8] = { [0] = "1", [1] = "2", @@ -993,6 +998,8 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen) inst->header.compression_control, &space); } err |= control (file, "thread control", thread_ctrl, inst->header.thread_control, &space); + if (gen >= 6) + err |= control (file, "acc write control", accwr, inst->header.acc_wr_control, &space); if (inst->header.opcode == BRW_OPCODE_SEND) err |= control (file, "end of thread", end_of_thread, inst->bits3.generic.end_of_thread, &space); |