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authorEric Anholt <eric@anholt.net>2010-12-13 11:32:19 -0800
committerEric Anholt <eric@anholt.net>2010-12-13 19:41:58 -0800
commitc27285610c9f9b50d06bf0f2725da195937cb48d (patch)
tree3229274755d8e46b16941b5f5dfcc7937fc8b072 /src/mesa/drivers/dri/i965/brw_draw.c
parentd88aa6fe3e9e08af332a900c69bf2bf5c4420e90 (diff)
i965: Add support for using the BLT ring on gen6.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_draw.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index a1f403ca4e..7eb16b71f4 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -159,7 +159,7 @@ static void brw_emit_prim(struct brw_context *brw,
}
if (prim_packet.verts_per_instance) {
intel_batchbuffer_data( brw->intel.batch, &prim_packet,
- sizeof(prim_packet));
+ sizeof(prim_packet), false);
}
if (intel->always_flush_cache) {
intel_batchbuffer_emit_mi_flush(intel->batch);
@@ -351,7 +351,8 @@ static GLboolean brw_try_draw_prims( struct gl_context *ctx,
* an upper bound of how much we might emit in a single
* brw_try_draw_prims().
*/
- intel_batchbuffer_require_space(intel->batch, intel->batch->size / 4);
+ intel_batchbuffer_require_space(intel->batch, intel->batch->size / 4,
+ false);
hw_prim = brw_set_prim(brw, &prim[i]);