diff options
| author | Eric Anholt <eric@anholt.net> | 2009-11-06 17:45:13 -0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2009-11-06 21:24:22 -0800 |
| commit | 8baee3d25beb616f6d5ba575684e889d60e38740 (patch) | |
| tree | 65ae13b2e5f3dbcfa47112077e405098e00d7b17 /src/mesa/drivers/dri/i965/brw_eu.h | |
| parent | ec66644ed0af976cacb069ca7c7f0d6731666359 (diff) | |
i965: Use Compr4 instruction compression mode on G4X and newer.
No statistically significant performance difference at n=3 with either
openarena or my GL demo, but cutting program size seems like a good
thing to be doing for the hypothetical app that has a working set near
icache size.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_eu.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_eu.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h index 30603bdd0e..39eb88d7c2 100644 --- a/src/mesa/drivers/dri/i965/brw_eu.h +++ b/src/mesa/drivers/dri/i965/brw_eu.h @@ -170,11 +170,11 @@ static INLINE struct brw_reg brw_reg( GLuint file, GLuint writemask ) { struct brw_reg reg; - if (type == BRW_GENERAL_REGISTER_FILE) + if (file == BRW_GENERAL_REGISTER_FILE) assert(nr < BRW_MAX_GRF); - else if (type == BRW_MESSAGE_REGISTER_FILE) - assert(nr < BRW_MAX_MRF); - else if (type == BRW_ARCHITECTURE_REGISTER_FILE) + else if (file == BRW_MESSAGE_REGISTER_FILE) + assert((nr & ~(1 << 7)) < BRW_MAX_MRF); + else if (file == BRW_ARCHITECTURE_REGISTER_FILE) assert(nr <= BRW_ARF_IP); reg.type = type; @@ -538,7 +538,7 @@ static INLINE struct brw_reg brw_mask_reg( GLuint subnr ) static INLINE struct brw_reg brw_message_reg( GLuint nr ) { - assert(nr < BRW_MAX_MRF); + assert((nr & ~(1 << 7)) < BRW_MAX_MRF); return brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, nr, 0); |