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authorEric Anholt <eric@anholt.net>2009-11-06 17:45:13 -0800
committerEric Anholt <eric@anholt.net>2009-11-06 21:24:22 -0800
commit8baee3d25beb616f6d5ba575684e889d60e38740 (patch)
tree65ae13b2e5f3dbcfa47112077e405098e00d7b17 /src/mesa/drivers/dri/i965/brw_eu_emit.c
parentec66644ed0af976cacb069ca7c7f0d6731666359 (diff)
i965: Use Compr4 instruction compression mode on G4X and newer.
No statistically significant performance difference at n=3 with either openarena or my GL demo, but cutting program size seems like a good thing to be doing for the hypothetical app that has a working set near icache size.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_eu_emit.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu_emit.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 241cdc33f8..7ceabba288 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -55,7 +55,8 @@ static void guess_execution_size( struct brw_instruction *insn,
static void brw_set_dest( struct brw_instruction *insn,
struct brw_reg dest )
{
- if (dest.type != BRW_ARCHITECTURE_REGISTER_FILE)
+ if (dest.file != BRW_ARCHITECTURE_REGISTER_FILE &&
+ dest.file != BRW_MESSAGE_REGISTER_FILE)
assert(dest.nr < 128);
insn->bits1.da1.dest_reg_file = dest.file;