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authorEric Anholt <eric@anholt.net>2008-01-10 10:48:05 -0800
committerEric Anholt <eric@anholt.net>2008-01-10 12:34:08 -0800
commita04b632350e5d0e9994fc667afc59407a39da0ba (patch)
tree8907f56e859999fe2448530e4f98fc29656a65b9 /src/mesa/drivers/dri/i965/brw_misc_state.c
parent7086df58688dc375ffd4c0fb9a9884eae05a6e46 (diff)
[intel] Add more cliprect modes to cover other meanings for batch emits.
The previous change gave us only two modes, one which looped over the batch per cliprect (3d drawing) and one that didn't (state updeast). However, we really want 4: - Batch doesn't care about cliprects (state updates) - Batch needs DRAWING_RECTANGLE looping per cliprect (3d drawing) - Batch needs to be executed just once (region fills, copies, etc.) - Batch already includes cliprect handling, and must be flushed by unlock time (copybuffers, clears). All callers should now be fixed to use one of these states for any batchbuffer emits. Thanks to Keith Whitwell for pointing out the failure.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_misc_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_misc_state.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index eefd22ecb2..acc19f7767 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -82,7 +82,7 @@ static void upload_binding_table_pointers(struct brw_context *brw)
{
struct intel_context *intel = &brw->intel;
- BEGIN_BATCH(6, INTEL_BATCH_NO_CLIPRECTS);
+ BEGIN_BATCH(6, IGNORE_CLIPRECTS);
OUT_BATCH(CMD_BINDING_TABLE_PTRS << 16 | (6 - 2));
OUT_BATCH(0); /* vs */
OUT_BATCH(0); /* gs */
@@ -112,7 +112,7 @@ static void upload_pipelined_state_pointers(struct brw_context *brw )
{
struct intel_context *intel = &brw->intel;
- BEGIN_BATCH(7, INTEL_BATCH_NO_CLIPRECTS);
+ BEGIN_BATCH(7, IGNORE_CLIPRECTS);
OUT_BATCH(CMD_PIPELINED_STATE_POINTERS << 16 | (7 - 2));
OUT_RELOC(brw->vs.state_bo, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ, 0);
if (brw->gs.prog_active)
@@ -184,7 +184,7 @@ static void upload_depthbuffer(struct brw_context *brw)
struct intel_region *region = brw->state.depth_region;
if (region == NULL) {
- BEGIN_BATCH(5, INTEL_BATCH_NO_CLIPRECTS);
+ BEGIN_BATCH(5, IGNORE_CLIPRECTS);
OUT_BATCH(CMD_DEPTH_BUFFER << 16 | (5 - 2));
OUT_BATCH((BRW_DEPTHFORMAT_D32_FLOAT << 18) |
(BRW_SURFACE_NULL << 29));
@@ -210,7 +210,7 @@ static void upload_depthbuffer(struct brw_context *brw)
return;
}
- BEGIN_BATCH(5, INTEL_BATCH_NO_CLIPRECTS);
+ BEGIN_BATCH(5, IGNORE_CLIPRECTS);
OUT_BATCH(CMD_DEPTH_BUFFER << 16 | (5 - 2));
OUT_BATCH(((region->pitch * region->cpp) - 1) |
(format << 18) |
@@ -445,7 +445,7 @@ static void upload_state_base_address( struct brw_context *brw )
/* Output the structure (brw_state_base_address) directly to the
* batchbuffer, so we can emit relocations inline.
*/
- BEGIN_BATCH(6, INTEL_BATCH_NO_CLIPRECTS);
+ BEGIN_BATCH(6, IGNORE_CLIPRECTS);
OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (6 - 2));
OUT_BATCH(1); /* General state base address */
OUT_BATCH(1); /* Surface state base address */