diff options
| author | Xiang, Haihao <haihao.xiang@intel.com> | 2007-12-19 10:22:28 +0800 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2007-12-19 10:22:28 +0800 |
| commit | 4cca760a9b7fe120ed92257a6a6c4a3a6e929ba8 (patch) | |
| tree | 3f60905714e8d04a59535d096884e3d8dce45c09 /src/mesa/drivers/dri/i965/brw_sf.c | |
| parent | e3a1ae0fcbd7582eb6fbd02384410d786c2b671b (diff) | |
i965: allocate GRF registers before building subroutines,
it ensures there are sufficient registers for all subroutines.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_sf.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_sf.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_sf.c b/src/mesa/drivers/dri/i965/brw_sf.c index b0702139b5..6c2f174bf5 100644 --- a/src/mesa/drivers/dri/i965/brw_sf.c +++ b/src/mesa/drivers/dri/i965/brw_sf.c @@ -87,18 +87,18 @@ static void compile_sf_prog( struct brw_context *brw, switch (key->primitive) { case SF_TRIANGLES: c.nr_verts = 3; - brw_emit_tri_setup( &c ); + brw_emit_tri_setup( &c, GL_TRUE ); break; case SF_LINES: c.nr_verts = 2; - brw_emit_line_setup( &c ); + brw_emit_line_setup( &c, GL_TRUE ); break; case SF_POINTS: c.nr_verts = 1; if (key->do_point_sprite) - brw_emit_point_sprite_setup( &c ); + brw_emit_point_sprite_setup( &c, GL_TRUE ); else - brw_emit_point_setup( &c ); + brw_emit_point_setup( &c, GL_TRUE ); break; case SF_UNFILLED_TRIS: c.nr_verts = 3; |