summaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri/i965/brw_structs.h
diff options
context:
space:
mode:
authorZhenyu Wang <zhenyuw@linux.intel.com>2010-08-20 14:37:19 -0700
committerEric Anholt <eric@anholt.net>2010-08-20 16:17:39 -0700
commit93ba0055c325007656c14ba38302e21be3dc599f (patch)
tree31fba7f6e423a3cbeb315c31e54a47c86488817d /src/mesa/drivers/dri/i965/brw_structs.h
parentffb5095d56c0f58a35e12d40bb4ffc869e4071bd (diff)
i965: Add AccWrCtl support on Sandybridge.
Whenever the accumulator results are needed, this bit must be set.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_structs.h')
-rw-r--r--src/mesa/drivers/dri/i965/brw_structs.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h
index 2fde42a706..1d6018fa36 100644
--- a/src/mesa/drivers/dri/i965/brw_structs.h
+++ b/src/mesa/drivers/dri/i965/brw_structs.h
@@ -1305,13 +1305,14 @@ struct brw_instruction
GLuint access_mode:1;
GLuint mask_control:1;
GLuint dependency_control:2;
- GLuint compression_control:2;
+ GLuint compression_control:2; /* gen6: quater control */
GLuint thread_control:2;
GLuint predicate_control:4;
GLuint predicate_inverse:1;
GLuint execution_size:3;
GLuint destreg__conditionalmod:4; /* destreg - send, conditionalmod - others */
- GLuint pad0:2;
+ GLuint acc_wr_control:1;
+ GLuint cmpt_control:1;
GLuint debug_control:1;
GLuint saturate:1;
} header;