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authorEric Anholt <eric@anholt.net>2007-10-04 12:07:25 -0700
committerEric Anholt <eric@anholt.net>2007-10-04 12:28:49 -0700
commit77e0523fb7769df4bf43747e136b1653b2421b97 (patch)
tree27337de5a5460aad8428969a504621c98e95fb16 /src/mesa/drivers/dri/i965/brw_tex_layout.c
parent0fc9efd8f0b1b6c4e3525a50e3478e5aef72531a (diff)
[965] Replace various alignment code with a shared ALIGN() macro.
In the process, fix some alignment issues: - Scratch space allocation was aligned into units of 1KB, while the allocation wanted units of bytes, so we never allocated enough space for scratch. - GRF register count was programmed as ALIGN(val - 1, 16) / 16 instead of ALIGN(val, 16) / 16 - 1, which overcounted for val != 16n+1.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_tex_layout.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_tex_layout.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 2094a1c8ad..e306c9cf10 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -37,8 +37,6 @@
#include "intel_tex_layout.h"
#include "macros.h"
-#define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1))
-
GLboolean brw_miptree_layout( struct intel_mipmap_tree *mt )
{
/* XXX: these vary depending on image format:
@@ -64,7 +62,7 @@ GLboolean brw_miptree_layout( struct intel_mipmap_tree *mt )
mt->pitch = ALIGN(width, align_w);
pack_y_pitch = (height + 3) / 4;
} else {
- mt->pitch = ((mt->width0 * mt->cpp + 3) & ~3) / mt->cpp;
+ mt->pitch = ALIGN(mt->width0 * mt->cpp, 4) / mt->cpp;
pack_y_pitch = ALIGN(mt->height0, align_h);
}