diff options
| author | Eric Anholt <eric@anholt.net> | 2011-01-05 17:02:08 -0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2011-01-05 18:23:54 -0800 |
| commit | 7ce6517f3ac41bf770ab39aba4509d4f535ef663 (patch) | |
| tree | 3563dc5da10a71f71981a0ceb5fdbd00b37a1f79 /src/mesa/drivers/dri/i965/brw_tex_layout.c | |
| parent | 01b70c06284f3a0ab2de61228b73c78ed00a1a14 (diff) | |
intel: Always allocate miptrees from level 0, not tObj->BaseLevel.
BaseLevel/MaxLevel are mostly used for two things: clamping texture
access for FBO rendering, and limiting the used mipmap levels when
incrementally loading textures. By restricting our mipmap trees to
just the current BaseLevel/MaxLevel, we caused reallocation thrashing
in the common case, for a theoretical win if someone really did want
just levels 2..4 or whatever of their texture object.
Bug #30366
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_tex_layout.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_tex_layout.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index 9ac0713a1d..66adc49cc9 100644 --- a/src/mesa/drivers/dri/i965/brw_tex_layout.c +++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c @@ -67,7 +67,7 @@ GLboolean brw_miptree_layout(struct intel_context *intel, i945_miptree_layout_2d(intel, mt, tiling, 6); - for (level = mt->first_level; level <= mt->last_level; level++) { + for (level = 0; level < mt->levels; level++) { for (q = 0; q < 6; q++) { intel_miptree_set_image_offset(mt, level, q, 0, q * qpitch); } @@ -101,7 +101,7 @@ GLboolean brw_miptree_layout(struct intel_context *intel, pack_x_pitch = width; pack_x_nr = 1; - for (level = mt->first_level ; level <= mt->last_level ; level++) { + for (level = 0; level < mt->levels; level++) { GLuint nr_images = mt->target == GL_TEXTURE_3D ? depth : 6; GLint x = 0; GLint y = 0; |