diff options
author | Eric Anholt <eric@anholt.net> | 2010-09-26 13:28:51 +0800 |
---|---|---|
committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-09-28 15:58:19 +0800 |
commit | a66e9a4d86d227b65874c43fbf9e299c7a26389f (patch) | |
tree | ac41c2d9ab3a4c67470353e270fc66c8a8380871 /src/mesa/drivers/dri/i965/brw_wm.c | |
parent | 79d56577700a4f4b8628b3b61098763d019f17d4 (diff) |
i965: Add support for attribute interpolation on Sandybridge.
Things are simpler these days thanks to barycentric interpolation
parameters being handed in in the payload.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_wm.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm.c | 51 |
1 files changed, 45 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 17ff3e2b2b..9ca8e709f5 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -279,13 +279,52 @@ static void brw_wm_populate_key( struct brw_context *brw, } } } - - brw_wm_lookup_iz(intel, - line_aa, - lookup, - uses_depth, - key); + if (intel->gen >= 6) { + /* R0-1: masks, pixel X/Y coordinates. */ + key->nr_payload_regs = 2; + /* R2: only for 32-pixel dispatch.*/ + /* R3-4: perspective pixel location barycentric */ + key->nr_payload_regs += 2; + /* R5-6: perspective pixel location bary for dispatch width != 8 */ + if (!fp->isGLSL) { /* dispatch_width != 8 */ + key->nr_payload_regs += 2; + } + /* R7-10: perspective centroid barycentric */ + /* R11-14: perspective sample barycentric */ + /* R15-18: linear pixel location barycentric */ + /* R19-22: linear centroid barycentric */ + /* R23-26: linear sample barycentric */ + + /* R27: interpolated depth if uses source depth */ + if (uses_depth) { + key->source_depth_reg = key->nr_payload_regs; + key->nr_payload_regs++; + if (!fp->isGLSL) { /* dispatch_width != 8 */ + /* R28: interpolated depth if not 8-wide. */ + key->nr_payload_regs++; + } + } + /* R29: interpolated W set if GEN6_WM_USES_SOURCE_W. + */ + if (uses_depth) { + key->source_w_reg = key->nr_payload_regs; + key->nr_payload_regs++; + if (!fp->isGLSL) { /* dispatch_width != 8 */ + /* R30: interpolated W if not 8-wide. */ + key->nr_payload_regs++; + } + } + /* R31: MSAA position offsets. */ + /* R32-: bary for 32-pixel. */ + /* R58-59: interp W for 32-pixel. */ + } else { + brw_wm_lookup_iz(intel, + line_aa, + lookup, + uses_depth, + key); + } /* BRW_NEW_WM_INPUT_DIMENSIONS */ key->proj_attrib_mask = brw->wm.input_size_masks[4-1]; |